Memristor In-Memory Sorting to Cut Data Transfer Overhead
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Solution Overview
Problem
Existing data sorting technologies in computing systems face inefficiencies due to high overhead in data transfer between memory and processing units, leading to increased processing time and energy consumption, particularly in hardware-based solutions like Batcher networks and conventional binary radix designs.
Innovation Solution
The development of in-memory sorting architectures utilizing memristive technology, specifically Binary and Unary Sorting designs, which implement sorting units directly within memristive memory arrays, reducing processing time and energy consumption by eliminating the need for data transfer between memory and processing units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If data sorting is performed using conventional off-memory architectures with separate memory and processing units, then the system can maintain clear separation of functions, but significant time and energy are wasted on data transfer between memory and processing unit
Solution Approach 1:
The patent merges the memory storage function and sorting processing function into a single integrated memory device. The memory cell array simultaneously stores data and performs sorting operations through in-memory computation, eliminating the need for data transfer between separate memory and processing units. This is achieved by implementing comparison and swap operations directly within the memory array using sense amplifiers and word line control.
2Productivity
If hardware-based sorting using Batcher networks is implemented, then sorting speed is significantly improved compared to software solutions, but the implementation cost and device complexity increase due to numerous CAS blocks required
Solution Approach 1:
The memory device performs sorting operations autonomously using its own internal resources without requiring external processing units. The sense amplifiers and word line control circuits within the memory array execute comparison and swap operations, allowing the memory device to sort data stored within itself. This self-service capability maintains high sorting speed while reducing overall system complexity.
3Manufacturing precision
If conventional binary radix CAS design is used, then the sorting function is accurately implemented, but the design complexity increases significantly as data-width increases
Solution Approach 1:
The sorting operation is segmented into multiple stages corresponding to bit positions, with each stage handling a specific bit comparison and swap operation. The memory array is divided into word lines that can be independently controlled, allowing sequential processing of different bit positions. This segmentation enables accurate binary radix sorting while managing design complexity through modular, staged implementation.
4Use of energy by moving object
If in-memory computation using memristors is implemented, then energy consumption is dramatically reduced by eliminating data transfer, but the technology requires specialized memristive components rather than conventional CMOS
Solution Approach 1:
The patent replaces conventional CMOS-based processing with memristive technology for in-memory computation. Memristors provide non-volatile storage and analog conductance states that enable energy-efficient comparison and swap operations directly within the memory array. This substitution eliminates the need for high-energy data transfer operations while performing sorting computations in-place, achieving dramatic energy reduction despite requiring specialized manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed architectures achieve significant reductions in processing time and energy consumption, with binary designs showing a 37× energy reduction and unary designs achieving a 138× energy reduction compared to conventional CMOS-based off-memory sorting systems, while improving performance for applications like median filtering.
Implementation Method 1
Memristors are electrical components that whose electrical resistance changes as a result of the electrical current flowing through the component. The memristor regulates the flow of electrical current through it and stores the amount of charge previously flowed through it
Data Source
AI summary
Disclosed herein is an architecture for in-memory sorting of data and methods by utilizing memristors crossbar arrays to perform in-memory sorting for both unary bit-stream and binary format data sets and method for utilizing same. Evaluations of the disclosed architecture and method reflect a significant reduction in energy costs and processing time as compared to currently available solutions.