Memristor Boolean Logic Circuit for Non-Destructive Logic Cascading

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Solution Overview

Problem

Conventional Boolean logic operations using memristors face challenges in achieving integrated logic operations with a small number of devices and operation steps while maintaining high efficiency and protecting input data integrity.

Innovation Solution

A non-volatile Boolean logic circuit comprising memristors and a resistor, where the controller sets memristor M2 to a high resistance state, applies specific voltages to memristor M1 and the resistor to perform logic operations, and reads the resistance state of memristor M2 to obtain the result, allowing for efficient execution of various logic operations with minimal device and step requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the first type of implementation method is used (input and output expressed in resistance state), then logic cascade can be performed, but the number of devices and operational steps increases significantly

Engineering Contradiction:
Improvelogic cascade capabilityVSAvoidnumber of devices and operational steps
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent uses a unified resistance state representation for both input and output that can serve multiple logic operations. The same memristor resistance states (high/low) are used for input signals and output results, allowing the circuit to perform different logic operations (AND, OR, NAND, NOR, XOR, XNOR) by varying only the control voltages applied to different memristors, rather than requiring separate circuits for each operation type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines multiple logic operations into a single circuit configuration using 5 memristors (M1-M5) and shared control lines. Instead of implementing each logic operation separately, the circuit merges all six logic functions into one unified structure where the same physical components perform different operations based on the applied voltage patterns, significantly reducing the total number of devices required.

Inventive Principle:
Principle #5Merging (Combining)

2Device complexity

If the second type of implementation method is used (input as voltage, output as resistance state), then the number of devices is reduced, but digital-to-analog signal conversion is required which reduces operation efficiency

Engineering Contradiction:
Improvenumber of devicesVSAvoidoperation efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent maintains homogeneity by using resistance states throughout the entire computation process for both inputs and outputs. The input signals are represented as resistance states of memristors M1 and M2, and the output is also a resistance state of memristor M5. This eliminates the need for digital-to-analog or analog-to-digital conversions, maintaining high operation efficiency while using a compact device structure.

Inventive Principle:
Principle #33Homogeneity

3Device complexity

If the third type of implementation method is used (input as voltage and initial resistance value), then fewer devices and operation steps are required, but the operation is destructive which compromises input information integrity

Engineering Contradiction:
Improvenumber of devices and operation stepsVSAvoidinput information integrity
Core Design Contradiction:
Device complexityVSLoss of information

Solution Approach 1:

The patent segments the computation process into distinct read and write operations using separate control lines. The control voltages applied to memristors M1-M5 through control lines BL1-BL5 and word lines WL1-WL5 allow the circuit to selectively perform read operations (measuring resistance without changing state) or write operations (changing resistance state) on different memristors. This segmentation enables non-destructive reading of input values while still performing the necessary computations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces control voltages as intermediary signals that mediate between the input resistance states and the output. By applying specific voltage patterns to control lines connected to the memristors, the circuit can perform logic operations without directly altering the input resistance states in a destructive manner. The control voltages act as mediators that enable computation while preserving input information integrity through proper voltage sequencing and levels.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables high-efficiency integrated Boolean logic operations with fewer devices and steps, ensuring non-destructive processing that protects input information integrity and facilitates simple logic cascading for complex functions.

Implementation Method 1

the memristor is a powerful candidate for in-memory computing architecture because of its non-volatility in nature, which allows the memristor to maintain a resistance state even after power is removed

Methodology Applied
Scientific EffectNon-volatility:

Implementation Method 2

When performing the logic operation, a voltage A is applied to the memristor M1, a voltage B is applied to the memristor M2, a voltage C is applied to the resistor, and the resistance state of the memristor M2 is read

Methodology Applied
Scientific EffectVoltage-induced resistance change:

Data Source

PatentUS11967953B2Non-volatile Boolean logic circuit based on memristors and operation method thereof
Publication Date: 2024.04.23 HUAZHONG UNIV OF SCI & TECH
  • US11967953B2 patent drawing
  • US11967953B2 patent drawing
  • US11967953B2 patent drawing

AI summary

A non-volatile Boolean logic circuit based on memristors and an operation method, which performs logic operations on the input logic value P and/or the input logic value Q. The logic circuit includes: a controller, a memristor M1, a memristor M2 and a resistor. The controller sets the memristor M2 to a high resistance state before performing the logic operation. When performing the logic operation, a voltage A is applied to the memristor M1, a voltage B is applied to the memristor M2, a voltage C is applied to the resistor. The resistance state of the memristor M2 is the result of the logic operation. When a logic operation is performed on the logic value P and the logic value Q or only on the logic value Q, the controller further sets the memristor M1 to the resistance state corresponding to the logic value Q before performing the logic operation.