Memristor-Based Non-Volatile Latch for Power-Efficient Data Storage
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Solution Overview
Problem
Conventional memory devices using shift registers require continuous power to prevent data loss, leading to significant idling power consumption, especially in devices that intermittently lose power or signals.
Innovation Solution
Incorporating memristors into memory devices such as shift registers, latches, and flip-flops to create non-volatile circuitry that retains information during power loss and reduces power consumption by enabling a sleep mode, using a memristor pair with a bias voltage and transmission gate to manage resistance states and store binary information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional shift registers are used to store data, then data can be accessed quickly, but continuous power is required to prevent data loss, leading to significant idling power consumption
Solution Approach 1:
The patent changes the operational parameters of the memory cell by introducing a memristor that can exist in different resistance states (high and low). This allows the memory cell to store data in a non-volatile manner, eliminating the need for continuous power supply while maintaining fast access speeds. The memristor's resistance state serves as the storage mechanism, replacing the traditional volatile RAM approach.
Solution Approach 2:
The patent combines conventional CMOS transistors with memristor technology to create a hybrid memory cell. This composite structure leverages the fast switching capability of CMOS transistors for data access while utilizing the non-volatile resistance states of the memristor for data retention, thus achieving both speed and power efficiency.
2Reliability
If continuous power is supplied to shift registers to maintain data, then data retention is ensured, but power consumption increases significantly during idle periods
Solution Approach 1:
The memristor-based memory cell serves itself by maintaining its resistance state without external power intervention. The high or low resistance state is inherently stable and persists without power, allowing the cell to maintain data retention autonomously. This self-service characteristic eliminates the need for continuous power supply to conventional flip-flops or shift registers.
Solution Approach 2:
The patent utilizes the memristor's ability to change and maintain its resistance parameter (from high to low or vice versa) as the data storage mechanism. This parameter change is non-volatile, ensuring reliable data retention without requiring continuous power, thus resolving the contradiction between reliability and power consumption.
3Quantity of substance
If conventional memory devices are used, then data can be stored, but the device size is larger compared to memristor-based solutions
Solution Approach 1:
The patent merges the storage and access functions into a single integrated cell structure that includes the memristor pair and associated transistors. This consolidation eliminates the need for separate storage and access circuits, reducing the overall device footprint while maintaining full data storage and retrieval functionality.
Solution Approach 2:
The patent transitions from planar CMOS transistor structures to a vertical stacking approach where memristors are positioned between transistor layers. This dimensional change allows for more compact integration, as the memristor's resistance state provides the storage function without requiring additional lateral space, thus reducing device size while maintaining storage capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces device size, power consumption, and eliminates idling power usage, allowing for efficient data retention and retrieval in devices that experience power fluctuations.
Implementation Method 1
A memristors often exhibits an ability to change its resistance as electrical voltage or current is applied to it. However, once the voltage or current is discontinued, the memristor's material maintains or 'remembers' the resistance change.
Data Source
AI summary
Storing data in a non-volatile latch may include applying a bias voltage to a memristor pair in electrical communication with at least one logic gate and applying a gate voltage to a transmission gate to allow an input voltage to be applied to the at least one logic gate where the input voltage is greater than the bias voltage and the input voltage determines a resistance state of the memristor pair.