Memristor Write Pulse Shaping for Latency Reduction

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Solution Overview

Problem

Memristors experience long write latency and high power consumption due to inefficient iterative write processes, which hinder the overall efficiency of systems relying on memristor-based implementations, particularly in applications like neural network accelerators.

Innovation Solution

A write process optimization circuit that dynamically shapes and terminates the write pulse based on memristor characteristics, allowing the write process to be completed in a minimal number of cycles, reducing latency and power consumption by identifying whether a memristor behaves as an 'adroit' or 'maladroit' cell population through current trajectory analysis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional iterative write processes are used for memristors, then write reliability is improved through verification cycles, but write latency increases significantly

Engineering Contradiction:
Improvewrite reliabilityVSAvoidwrite latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing a read operation before the write operation to determine the memristor's initial state. Based on this preliminary information, the system pre-determines the appropriate write pulse parameters (voltage magnitude, pulse width) needed to achieve the target resistance state, eliminating the need for iterative verify-write cycles and reducing write latency while maintaining reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using the read operation to obtain information about the memristor's current state, then using this feedback to adjust and optimize the write pulse parameters. This feedback mechanism allows the system to adapt the write process to the specific characteristics of each memristor cell, ensuring reliable programming while minimizing write time

Inventive Principle:
Principle #23Feedback

2Speed

If higher voltage pulses are applied to reduce write time, then write speed is improved, but power consumption increases

Engineering Contradiction:
Improvewrite speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting multiple parameters of the write pulse based on the memristor's initial state and target state. The system modifies voltage magnitude, pulse width, and potentially pulse shape to optimize the write process. This allows achieving fast write speeds with lower power consumption by using the minimum necessary voltage and duration for each specific programming task, rather than applying fixed high-power pulses

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If uniform write pulse parameters are used for all memristors, then device complexity is reduced, but write precision deteriorates due to device variability

Engineering Contradiction:
Improvecontrol circuit complexityVSAvoidwrite precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent implements local quality by applying customized write pulse parameters to each memristor based on its individual characteristics and state. Instead of using uniform parameters for all devices, the system tailors the write pulse voltage, width, and shape to the specific requirements of each memristor cell, accounting for device variability and ensuring precise programming while managing complexity through efficient characterization

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces write time latency by up to tenfold, achieving the target state in a single cycle and minimizing power consumption, compared to conventional iterative methods, thereby enhancing the efficiency of memristor-based systems.

Implementation Method 1

The programming energy generates a combination of electric field and thermal effects that are to modulate the conductivity of both non-volatile switch and non-linear select functions in a switching element

Methodology Applied
Scientific EffectElectric field: Electric Field

Implementation Method 2

The programming energy generates a combination of electric field and thermal effects that are to modulate the conductivity of both non-volatile switch and non-linear select functions in a switching element

Methodology Applied
Scientific EffectThermal effects: Heating

Data Source

PatentUS11024379B2Methods and systems for highly optimized memristor write process
Publication Date: 2021.06.01 HEWLETT PACKARD ENTERPRISE DEV LP
  • US11024379B2 patent drawing
  • US11024379B2 patent drawing
  • US11024379B2 patent drawing

AI summary

Systems and methods for providing write process optimization for memristors are described. Write process optimization circuitry manipulates the memristor's write operation, allowing the number of cycles in the write process is reduced. Write process optimization circuitry can include write current integration circuitry that measures an integral of a write current over time. The write optimization circuitry can also include shaping circuitry. The shaping circuitry can shape a write pulse, by determining the pulse's termination, width, and slope. The write pulse is shaped depending upon whether the target memristor device exhibits characteristics of “maladroit” cells or “adroit” cells. The pulse shaping circuitry uses the integral and measured write current to terminate the write pulse in a manner that allows the memristor, wherein having maladroit cells and adroit cells, to reach a target state. Thus, utility of memristors is enhanced by realizing an optimized write process with decrease latency and improved efficiency.