Memristor Logic Gate Circuit for XOR and Half Adder Functions
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Solution Overview
Problem
Current memristor-based logic circuits lack essential auxiliary logic gates, such as exclusive OR gates, which limits the design of half adder circuits and restricts the application of MAGIC technology, affecting user experience.
Innovation Solution
A memristor-based logic gate circuit is developed by combining two input memristors and a second memristor in a MAGIC-based AND logic gate, utilizing a controllable switch to differentiate resistance states and implement an exclusive OR logic gate, also functioning as a half adder.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If only basic logic gates (AND, NAND, OR, NOR) are implemented in MAGIC circuits, then the circuit structure remains simple, but the functionality is insufficient for designing half adder circuits and other auxiliary logic operations
Solution Approach 1:
The patent implements a multi-functional logic gate circuit that can perform both AND operations and XOR operations using the same MAGIC circuit structure. By controlling the resistance states of the memristors and using appropriate read operations, the circuit can function as either an AND gate or an XOR gate, eliminating the need for separate dedicated circuits for each logic operation.
Solution Approach 2:
The patent uses dynamically controllable memristor resistance states to change the logic gate functionality. By adjusting the resistance values of the memristors through write operations and selecting different read operation modes, the circuit can dynamically switch between different logic functions (AND, XOR, etc.), providing adaptability without requiring physical reconfiguration of the circuit structure.
2Adaptability or versatility
If additional auxiliary logic gates are added to the MAGIC circuit, then the functionality for half adder design is improved, but the circuit complexity increases
Solution Approach 1:
The patent creates a universal logic gate platform where the same MAGIC circuit can implement multiple logic functions including AND, OR, NAND, NOR, and XOR gates. This is achieved by configuring the memristor resistance states and selecting different read operation modes, providing auxiliary logic gate functionality without adding separate dedicated circuits for each gate type.
Solution Approach 2:
The patent combines multiple logic gate functionalities into a single MAGIC circuit structure. By merging the AND gate functionality with controllable resistance state manipulation, the circuit simultaneously provides AND operations and XOR operations, reducing the overall circuit complexity compared to implementing separate dedicated circuits for each logic function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables the formation of an exclusive OR logic gate and a half adder circuit, enhancing the application of MAGIC technology and improving user experience by effectively utilizing memristor resistance states to represent logical operations.
Implementation Method 1
The logic state of a (MAGIC (Memristor-Aided Logic)) circuit composed merely of the memristors may be represented by a resistance value
Implementation Method 2
a second memristor having a first end connected to the first power supply, used for presenting a low-resistance state merely when the first power supply supplies power to itself
Data Source
AI summary
An electronic device and a memristor-based logic gate circuit thereof. In the present application, a control end of a controllable switch is connected to a negative end of an output memristor in a MAGIC-based AND logic gate, and whether a second memristor is powered on is controlled by the controllable switch. Thus, when resistance value states of two input memristors in the AND logic gate are different, the controllable switch will conduct and power on the second memristor, and the second memristor will present a low-resistance state at this time. When the resistance value states of the two input memristors are the same, the controllable switch will not conduct and the second memristor will then remain the state unchanged, i.e., presents a high-resistance state. An exclusive OR logic gate is formed by combining the two input memristors and the second memristor.