MEMS Cantilever Switch Planarized Electrode CMP Process

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Solution Overview

Problem

Traditional MEMS technologies face challenges in achieving a planarized lower electrode configuration without compromising the structural integrity of the device, as sacrificial films tend to follow underlying contours, leading to structural integrity issues.

Innovation Solution

A method involving the deposition of electrically conductive layers over a substrate with vias, followed by chemical mechanical polishing (CMP) to create planarized electrodes, allowing for the formation of a cantilever switch in electrical communication with the polished electrodes, while encapsulating the dielectric layer and forming a cantilever device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sacrificial films are blanket deposited over underlying structures, then complete coverage is achieved, but the films follow the contours of underlying structures compromising structural integrity

Engineering Contradiction:
Improvestructural integrityVSAvoidcontour following
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The patent applies preliminary planarization by depositing a planarizing dielectric layer over the underlying structure before depositing the sacrificial film. This creates a flat surface in advance, preventing the sacrificial film from conforming to non-planar contours and thus resolving the contradiction between complete coverage and structural integrity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a planarizing dielectric layer as an intermediary between the underlying structure and the sacrificial film. This intermediate layer acts as a mediator that provides a planar surface for sacrificial film deposition, eliminating the direct contact between the sacrificial film and the non-planar underlying structure

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If planarizing spin-on film is used for sacrificial layers, then planarization is improved, but the underlying electrode topographies still require planarization

Engineering Contradiction:
Improveplanarization qualityVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges the planarization function into a single dedicated planarizing dielectric layer that is deposited before the sacrificial film. This combines multiple planarization requirements into one unified layer, improving manufacturing precision while reducing overall process complexity by eliminating redundant planarization steps

Inventive Principle:
Principle #5Merging (Combining)

3Manufacturing precision

If CMP is used to planarize the lower electrode, then planar MEMS technology is enabled, but material removal must be controlled to maintain structural integrity

Engineering Contradiction:
Improveelectrode planarityVSAvoidstructural integrity
Core Design Contradiction:
Manufacturing precisionVSStrength

Solution Approach 1:

The patent applies local quality by using a multi-layer structure where different layers have different properties. The sacrificial film layer is designed with specific thickness and material properties that allow selective removal during CMP, enabling precise control of material removal to achieve electrode planarity while preserving the structural integrity of the underlying and overlying layers

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the fabrication of MEMS devices with improved mechanical performance and design flexibility by ensuring the structural integrity of the MEMS device is maintained, utilizing industry-standard oxide CMP technologies to achieve fully embedded and planarized electrodes.

Implementation Method 1

chemical mechanical polishing the second dielectric layer and at least a portion of the patterned electrically conductive layers to create polished electrodes

Methodology Applied
Scientific EffectChemical mechanical polishing:

Data Source

PatentEP2542499B1CMP process flow for MEMS
Publication Date: 2017.03.22 CAVENDISH KINETICS INC
  • EP2542499B1 patent drawing
  • EP2542499B1 patent drawing
  • EP2542499B1 patent drawing

AI summary

The present invention generally relates to the formation of a micro-electromechanical system (MEMS) cantilever switch in a complementary metal oxide semiconductor (CMOS) back end of the line (BEOL) process. The cantilever switch is formed in electrical communication with a lower electrode in the structure. The lower electrode may be either blanket deposited and patterned or simply deposited in vias or trenches of the underlying structure. The excess material used for the lower electrode is then planarized by chemical mechanical polishing or planarization (CMP). The cantilever switch is then formed over the planarized lower electrode.