MEMS-IC Wafer Integration via Selective Doping
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Solution Overview
Problem
Manufacturers face challenges in integrating micro-electromechanical (MEMS) and integrated circuit (IC) regions on a single wafer due to differences in processing techniques, which affect device performance and packaging efficiency.
Innovation Solution
The method involves selectively doping epitaxial layers on a single wafer to create a MEMS region with a higher dopant concentration adjacent to an IC region, forming a transition region that allows for the integration of MEMS structures with IC active components without degrading performance, using epitaxial growth and doping techniques such as ion implantation and annealing to achieve distinct dopant concentrations for both regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If ICs and MEMS are formed on separate wafers and then electrically connected, then device functionality is achieved, but device size increases and packaging efficiency decreases
Solution Approach 1:
The patent merges IC and MEMS fabrication processes onto a single wafer, creating a unified structure where both device types coexist on the same substrate. This eliminates the need for separate wafer processing and subsequent electrical connection steps, directly reducing device size while maintaining manufacturing feasibility through integrated process design.
Solution Approach 2:
The patent applies local quality by using selective doping techniques to create region-specific material properties within the single wafer structure. Different areas of the wafer receive tailored dopant concentrations and types, enabling simultaneous optimization of IC and MEMS regions while maintaining ease of manufacture through localized process control.
2Reliability
If different processing techniques are used for ICs and MEMS, then device performance is optimized, but integration on a single wafer becomes difficult
Solution Approach 1:
The patent segments the wafer into distinct IC regions and MEMS regions, allowing each segment to undergo specialized processing optimized for its specific device type. This spatial segmentation enables different processing techniques to be applied to different areas of the same wafer, maintaining device performance while achieving integration capability.
Solution Approach 2:
The patent utilizes parameter changes, specifically varying dopant concentration and type across different wafer regions, to accommodate different processing requirements for IC and MEMS devices. By controlling doping parameters locally, the patent enables both device types to achieve optimal performance while being integrated on a single wafer.
3Ease of manufacture
If a single dopant concentration is used across the entire wafer, then processing is simplified, but distinct IC and MEMS regions cannot be formed
Solution Approach 1:
The patent applies preliminary action by forming a uniform epitaxial layer across the entire wafer first, which simplifies the initial processing step. Subsequently, selective doping is applied to create region-specific properties. This two-stage approach maintains processing simplicity while achieving the manufacturing precision needed for distinct IC and MEMS regions.
Solution Approach 2:
The patent implements local quality by applying selective doping to specific regions after forming a uniform base layer. This allows the majority of the wafer to maintain a simple, uniform structure for ease of manufacture, while localized regions receive specialized doping to achieve the manufacturing precision required for distinct functional areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the integration of MEMS and IC regions on a single wafer without affecting device performance, allowing for smaller devices with enhanced functionality and improved packaging efficiency by creating a transition region that supports both MEMS and IC components.
Implementation Method 1
a silicon layer is grown or deposited over the entire wafer having a first dopant concentration configured for forming transistors
Implementation Method 2
A mask is formed over the IC region where the transistors are to be formed, leaving a surface of the silicon layer over the MEMS region exposed for processing
Implementation Method 3
The MEMS region is then heavily doped to form a portion of the silicon layer dedicated to forming a MEMS structure
Implementation Method 4
using epitaxial growth and doping techniques such as ion implantation and annealing to achieve distinct dopant concentrations for both regions
Data Source
AI summary
A method that includes forming a first layer having a first dopant concentration, the first layer having an integrated circuit region and a micro-electromechanical region and doping the micro-electromechanical region of the first layer to have a second dopant concentration is presented. The method includes forming a second layer having a third dopant concentration overlying the first layer, doping the second layer that overlies the micro-electromechanical region to have a fourth dopant concentration, forming a micro-electromechanical structure in the micro-electromechanical region using the first and second layers, and forming active components in the integrated circuit region using the second layer.