MEMS Membrane Cavity Formation for Parasitic Capacitance Reduction
Solution Overview
Problem
Manufacturing variations in silicon microphones using micro-electromechanical systems (MEMS) technology lead to inconsistencies in membrane sensitivity and noise due to process variations, resulting in parasitic effects.
Innovation Solution
A method of forming semiconductor devices involves creating a sacrificial layer, forming a membrane over it, and removing the sacrificial layer to create a cavity aligned with the membrane, which includes forming trenches and etching from both sides of the substrate to achieve precise alignment and minimize parasitic capacitance effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional MEMS manufacturing processes are used, then production efficiency is maintained, but manufacturing precision of membrane diameter and surface roughness deteriorates due to process variations
Solution Approach 1:
The patent applies preliminary action by forming the sacrificial layer and defining the cavity structure before membrane deposition. This ensures that the membrane is deposited over a pre-defined template, allowing precise control of membrane diameter and surface roughness without requiring post-processing adjustments that would reduce productivity.
Solution Approach 2:
The patent uses a sacrificial layer as an intermediary structure to define the cavity geometry. This intermediary enables precise membrane formation by providing a temporary template that is removed after membrane deposition, achieving high manufacturing precision without compromising production efficiency through complex post-processing steps.
2Reliability
If membrane size is increased to improve sensitivity, then acoustic signal detection is enhanced, but parasitic capacitance effects increase resulting in noise
Solution Approach 1:
The patent resolves the contradiction by transitioning from a planar membrane structure to a three-dimensional cavity structure. The cavity provides vertical separation between the membrane and substrate, reducing parasitic capacitance while maintaining large membrane area for sensitivity. This dimensional change allows the membrane to be both large and low-noise simultaneously.
Solution Approach 2:
The patent extracts the problematic parasitic capacitance by removing the sacrificial layer to create a cavity, thereby separating the membrane from the substrate. This extraction eliminates the harmful capacitive coupling while preserving the beneficial large membrane area for acoustic signal detection.
3Object-generated harmful factors
If substrate thinning is performed to reduce parasitic effects, then noise is reduced, but structural strength and reliability deteriorate
Solution Approach 1:
The patent applies preliminary action by forming the cavity structure through sacrificial layer removal before final device assembly. This allows the substrate to maintain its full thickness and structural strength throughout manufacturing, while still achieving reduced parasitic effects through the pre-formed cavity that separates the membrane from the substrate.
Data Source
AI summary
In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a sacrificial layer over a first surface of a workpiece having the first surface and an opposite second surface. A membrane is formed over the sacrificial layer. A through hole is etched through the workpiece from the second surface to expose a surface of the sacrificial layer. At least a portion of the sacrificial layer is removed from the second surface to form a cavity under the membrane. The cavity is aligned with the membrane.