MEMS Metallization Kerf and Passivation for Crack-Free Separation

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Solution Overview

Problem

The existing methods for manufacturing microelectromechanical systems (MEMS) face challenges in achieving high wafer yield and minimizing mechanical defects during the separation process, as breaking the wafer can lead to cracks in the back end of line (BEOL) layers, resulting in production rejections and operational drifts.

Innovation Solution

A method involving the dual use of release etching and passivation steps, where a kerf is created in the metallization layer structure to facilitate separation while also releasing functional elements, and a passivation layer is deposited on the kerf and notch surfaces to protect the metallization layer and prevent cracks, allowing for precise and robust separation without additional time or cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the wafer is broken for separation, then the separation process is completed, but cracks occur in the BEOL layers resulting in mechanical defects

Engineering Contradiction:
Improveseparation performanceVSAvoidmechanical defects
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A kerf is created in the metallization layer structure before the actual separation process. This preliminary action provides a predefined separation path that guides the breaking process, ensuring that cracks follow the kerf line rather than propagating randomly through the BEOL layers, thus completing separation while minimizing mechanical defects

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The kerf acts as an intermediary structure between the intact wafer and the separated dies. It serves as a controlled weakness that facilitates separation along a predetermined path, mediating the separation process to prevent uncontrolled cracking in the BEOL layers

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If additional protection steps are added to prevent cracks, then mechanical defects are reduced, but manufacturing time and cost increase

Engineering Contradiction:
Improverobustness of MEMSVSAvoidmanufacturing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The release etching step serves dual purposes: it releases the functional elements from the sacrificial layer and simultaneously creates the kerf in the metallization layer structure. This merging of functions achieves crack prevention without adding separate processing steps, maintaining manufacturing efficiency while improving mechanical reliability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The kerf structure serves multiple functions: it acts as a separation guide, a crack arrestor, and a stress relief feature. By making the kerf multi-functional, the patent achieves comprehensive protection against mechanical defects without requiring additional dedicated protection steps

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the separation performance, reduces mechanical defects, and increases the robustness of MEMS by preventing cracks and corrosion, leading to higher wafer yield and extended product lifetime.

Implementation Method 1

Release etching is performed from a surface of the metallization layer structure towards the processed semiconductor substrate, for generating a kerf in the metallization layer structure

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

depositing a passivation layer (e.g., an insulator layer) at a first surface (e.g., a notch surface) of the optional notch and at a second surface (e.g., a kerf surface) of the kerf

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS10766769B2Semiconductor element and methods for manufacturing the same
Publication Date: 2020.09.08 INFINEON TECHNOLOGIES AG
  • US10766769B2 patent drawing
  • US10766769B2 patent drawing
  • US10766769B2 patent drawing

AI summary

A semiconductor element includes a processed substrate arrangement including a processed semiconductor substrate and a metallization layer arrangement on a main surface of the processed semiconductor substrate. The semiconductor element further includes a passivation layer arranged at an outer border of the processed substrate arrangement.