MEMS Acceleration Sensor Self-Aligned Polysilicon Wiring
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Solution Overview
Problem
Existing MEMS acceleration sensors face challenges in miniaturization and prevention of electrostatic sticking between movable and fixed electrodes due to misalignment and size issues in wiring layer formation, which affects accuracy and reliability.
Innovation Solution
A capacitive acceleration sensor design using a silicon substrate with a conductive polysilicon wiring layer that is self-aligned and electrically insulated by a silicon oxide layer, eliminating the need for additional via structures and allowing for precise alignment and reduced size, while the isolation joint and bump stop configuration restricts movement and prevents electrostatic sticking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If aluminum wiring electrodes are used with via structures for electrical connection, then electrical connectivity is achieved, but device size increases and manufacturing precision decreases due to misalignment
Solution Approach 1:
The patent removes the via structure from the conventional wiring configuration. Instead of using aluminum wiring electrodes with via holes for electrical connection, the invention employs polysilicon wiring layers that are formed in direct contact with the movable and fixed electrodes, eliminating the need for separate via structures and their associated alignment procedures.
Solution Approach 2:
The patent combines the wiring layer formation and electrical connection functions into a single integrated structure. The polysilicon wiring layers are formed to directly contact both the movable electrode and fixed electrode, merging what were previously separate steps (via formation, wiring deposition, and alignment) into a unified configuration that simplifies manufacturing and improves precision.
2Volume of moving object
If conventional wiring layer formation is used, then electrical connections are established, but device miniaturization is limited due to size requirements for via structures
Solution Approach 1:
The patent transitions from a vertical via-based connection approach to a planar wiring layer approach. By forming polysilicon wiring layers that extend across and contact the electrodes in the planar direction rather than requiring vertical via holes, the design enables miniaturization while maintaining reliable electrical connections through direct lateral contact.
3Reliability
If movable portion is allowed free movement, then sensor functionality is maintained, but electrostatic sticking occurs between movable and fixed electrodes
Solution Approach 1:
The patent applies preliminary anti-action by introducing electrostatic repulsion forces before sticking can occur. By applying voltages to the fixed electrode and movable electrode to generate repulsive electrostatic forces, the system preemptively counteracts the attractive forces that would cause sticking, allowing the movable portion to maintain both mobility and reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables miniaturization of the acceleration sensor, prevents sticking between electrodes, and maintains accuracy by ensuring precise electrical connections and movement restriction, thus enhancing the sensor's performance and reliability.
Implementation Method 1
the wiring layer is electrically insulated from the silicon layer by the insulating layer
Implementation Method 2
a wiring layer made of a conductive silicon-containing material, the wiring layer being formed to be in contact with the silicon layer
Implementation Method 3
the isolation joint and bump stop configuration restricts movement and prevents electrostatic sticking
Implementation Method 4
A capacitive acceleration sensor design using a silicon substrate with a conductive polysilicon wiring layer
Data Source
AI summary
A MEMS device includes: a substrate including a silicon layer; an isolation joint configured to divide the substrate into a first portion including an insulating layer formed on the silicon layer and a second portion including the silicon layer in a plan view, and configured to electrically insulate the first portion and the second portion while mechanically connecting the first portion and the second portion; and a wiring layer arranged on the substrate.