MEMS Microphone Resampling for Restart-Free Clock Mode Switching

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Solution Overview

Problem

Existing MEMS microphones face challenges in seamlessly adjusting between operating modes without restart delays and minimizing switching artefacts during transitions between low power and high performance modes.

Innovation Solution

A method and circuit design that allows for seamless adjustment between low power and high performance modes in MEMS microphones by using a clock divider and multiplexer responsive to an external control signal, maintaining a constant output signal clock rate, and employing interpolation stages to minimize disruptions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the sampling rate is changed to adjust between low power and high performance modes, then power consumption and performance are optimized, but restart delays and switching artefacts occur

Engineering Contradiction:
Improvepower consumptionVSAvoidrestart delay
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The system dynamically adjusts the internal clock frequency based on operational mode requirements while maintaining a constant output sampling rate. The clock frequency is changed from 256 kHz to 1 MHz internally, but the output rate remains constant at 16 kHz through resampling operations, enabling seamless mode transitions without restart delays

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

A resampling stage acts as an intermediary between the variable internal clock and the fixed output sampler. This intermediate component buffers the clock frequency changes and performs gradual resampling, preventing direct transmission of switching artefacts to the output while maintaining continuous operation

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the internal clock frequency is changed to optimize performance, then processing speed and performance are improved, but switching artefacts are introduced

Engineering Contradiction:
Improveprocessing speedVSAvoidswitching artefacts
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The system implements dynamic clock frequency adjustment where the internal clock can operate at different frequencies (256 kHz or 1 MHz) depending on performance requirements. The output sampler maintains a constant 16 kHz rate, and resampling operations smoothly transition between clock frequencies without introducing audible artefacts

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The resampling stage serves as a mediator that decouples the internal clock frequency changes from the output signal. It performs gradual rate conversion between the variable internal clock and fixed output sampler, filtering out switching artefacts before output

Inventive Principle:
Principle #24Intermediary (Mediator)

3Use of energy by moving object

If the sampling rate is adjusted between modes, then power consumption is reduced, but complexity of mode switching increases

Engineering Contradiction:
Improvepower consumptionVSAvoidmode switching complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The system uses a universal resampling stage that handles both low power mode (256 kHz internal clock) and high performance mode (1 MHz internal clock) operations. This single multi-functional component manages all sampling rate conversions and clock frequency adjustments, simplifying the overall mode switching architecture

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250223155A1Configurable microphone using internal clock changing
Publication Date: 2025.07.10 INFINEON TECHNOLOGIES AG
  • US20250223155A1 patent drawing
  • US20250223155A1 patent drawing
  • US20250223155A1 patent drawing

AI summary

A method of operating a microelectromechanical system (MEMS) includes, in a first operational mode, converting an analog output of the MEMS into a first internal data stream and a first external data stream having a first sampling rate; transitioning from the first operational mode to a second operation mode without restarting the MEMS; and in the second operational mode, converting the analog output of the MEMS into a second internal data stream having a second sampling rate different from the first sampling rate, and performing a sampling rate conversion of the second internal data stream to generate a second external data stream.