MEMS RTC Clock Generator With Jitter Compensation at Switching Edges
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Solution Overview
Problem
Existing MEMS-based Real Time Clock (RTC) generators face challenges in achieving low jitter and low power consumption while maintaining frequency stability, particularly due to temperature variations, which often result in high consumption levels and large component sizes, making them unsuitable for portable devices.
Innovation Solution
A clock generator that compensates for jitter by delaying switching edges based on quantization errors, using a delta-sigma modulator to generate a control signal for a fractional divider, and a jitter-suppression filter to select delayed clock signals, thereby regulating the phase of switching edges without affecting frequency, thus reducing power consumption and component size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If temperature compensation circuits are added to stabilize frequency, then frequency stability is improved, but power consumption and component size increase
Solution Approach 1:
The patent replaces complex electronic temperature compensation circuits with a simplified digital approach using a fractional divider and jitter suppression filter. The fractional divider dynamically adjusts division ratios based on temperature, while the jitter suppression filter corrects phase errors, achieving frequency stability without requiring extensive analog circuitry or high power consumption.
Solution Approach 2:
The system changes the division ratio parameter dynamically based on temperature variations. The fractional divider adjusts its division ratio (e.g., between N and N+1) according to temperature compensation codes, allowing the system to maintain accurate frequency output across temperature ranges while consuming minimal power through digital parameter adjustment rather than complex circuit modifications.
2Stability of the object's composition
If traditional temperature compensation methods are used, then frequency stability is improved, but device area and complexity increase
Solution Approach 1:
The patent segments the frequency stabilization function into distinct modular components: a fractional divider that handles division ratio adjustment, a jitter suppression filter that corrects phase errors, and temperature compensation logic. This segmentation allows each component to perform a specific function with minimal complexity, avoiding the need for a monolithic complex compensation circuit.
Solution Approach 2:
The patent introduces intermediate digital processing stages between the resonator and output. The fractional divider acts as an intermediary that dynamically adjusts frequency division based on temperature, and the jitter suppression filter serves as another intermediary that corrects phase errors. These intermediaries simplify the overall system by breaking down complex compensation into manageable digital steps.
3Measurement precision
If jitter compensation is implemented, then phase accuracy is improved, but additional components and power consumption are required
Solution Approach 1:
The jitter suppression filter uses the quantization error signal from the fractional divider's own operation to generate correction signals. Rather than requiring external high-power compensation circuits, the system self-services by recycling its internal quantization error information to drive the jitter correction process, achieving phase accuracy with minimal additional power consumption.
Solution Approach 2:
The system implements feedback by using the quantization error signal from the fractional divider to control the jitter suppression filter. The filter selectively delays clock signals based on this feedback information, creating a closed-loop system that automatically corrects phase errors without requiring external high-power intervention circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves low jitter and low power consumption with reduced component size, enabling stable operation across varying temperatures and improving the suitability for portable devices by compensating for phase errors at the switching edges.
Implementation Method 1
resonant micromechanical structures manufactured using micromachining techniques, which, as a result of external stresses (including appropriate d.c. electrical biasings and a.c. driving signals), are induced to vibrate at a natural resonance frequency thereof
Implementation Method 2
an amplifier stage (not illustrated, including, for example, a current-to-voltage converter stage with gain Gm, feedback-connected to the resonant micromechanical structure) receiving the sensing signal and converting it into a resonance frequency signal
Data Source
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Figure 5
AI summary
A clock generator (30) having a variable-modulus frequency divider (34), receiving a high-frequency clock signal (HFCK) and outputting a divided clock signal (DIV) having a frequency controlled by a modulus-control signal (MC) generated by a temperature-compensation circuit (36). A jitter filter (35) is coupled to the output of the variable-modulus frequency divider (34) and to the temperature-compensation circuit (36) and generates a compensated clock signal (OUT) having switching edges that are delayed, with respect to the divided clock signal (DIV), by a time correlated to a quantization-error signal.