MEMS Dielectric Sensor Interconnection Scheme
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The resistivity of polysilicon limits the geometries in which it can be effectively used for interconnections in MEMS devices, making it difficult to achieve proper interconnection of pillar electrodes across diaphragms while maintaining symmetry and performance, especially when conventional conductive materials are buried deep within the layer stack.
Innovation Solution
The use of additional metal interconnection layers or runner strips on the surface of the MEMS layer stack allows for connection to buried interconnection structures, enabling the continued use of polysilicon as buried interconnect material while maintaining symmetry and performance by providing a path for electrical connections through the diaphragm.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If polysilicon is used as buried interconnect material, then conventional processing is maintained, but the resistivity limits the geometries and interconnection effectiveness
Solution Approach 1:
The interconnection system is segmented into two functional parts: buried polysilicon interconnects for conventional processing and low-resistivity metal runners for effective signal transmission. The polysilicon layers (e.g., polysilicon 135, 145) provide the buried interconnection, while separate metal runner layers (e.g., metal 180, 190, 200) provide the low-resistivity pathways, dividing the interconnection function to overcome the resistivity limitation of polysilicon while maintaining manufacturing simplicity.
Solution Approach 2:
The interconnection system uses a composite structure combining polysilicon and metal materials. The polysilicon provides mechanical integration with the MEMS layer stack and enables conventional processing, while the metal runners provide low-resistivity electrical conduction. This composite approach allows each material to contribute its strengths: polysilicon for structural integration and metal for electrical performance.
2Reliability
If metal interconnection layers are added on the surface, then polysilicon resistivity limitations are overcome, but device complexity increases
Solution Approach 1:
The metal runners are placed in a different dimensional space than the polysilicon interconnects. The polysilicon forms buried horizontal interconnects within the MEMS layer stack, while the metal runners form surface-level interconnects that can run in different patterns and connect to different polysilicon regions. This dimensional separation allows the metal to overcome polysilicon resistivity limitations without requiring complex reconfiguration of the existing polysilicon layer structure.
Solution Approach 2:
The metal runners act as intermediary elements that mediate between the buried polysilicon interconnects and the external circuitry or other functional elements. The metal runners pick up signals from the polysilicon interconnects at contact points and transport them across the device surface to destinations that may be difficult to reach through the polysilicon layer alone, thus simplifying the overall interconnection architecture while improving effectiveness.
Data Source
AI summary
A microelectromechanical systems (MEMS) die comprises a first diaphragm having a first side and a second side, and a second diaphragm having a first side facing the first side of the first diaphragm. A first plurality of interconnect strips is disposed along at least the first side of the first diaphragm, a second plurality of interconnect strips is disposed along the first side of the first diaphragm, and a third plurality of interconnect strips is disposed along the first side of the second diaphragm. First, second, and third runner strips are disposed along the second side of the first diaphragm transverse to the first, second, and third plurality of interconnect strips, respectively. Each of the first, second, and third runner strips is electrically connected to at least a subset of the first, second, and third plurality of interconnect strips, respectively, via electrical connections disposed through the first diaphragm.