Wafer Level MEMS Sensor Packaging via Double Bonding

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Solution Overview

Problem

Conventional MEMS sensor packaging technologies face challenges in achieving high-density packaging and maintaining performance stability due to external factors like moisture and dust, especially when high-speed operations are required, and existing hermetic sealing methods have limitations in preventing performance deterioration from foreign matter attachment during wafer dicing.

Innovation Solution

A wafer level package using a double bonding technique that combines anodic bonding and eutectic bonding to stack three-dimensional wafers, where a lower electrode layer is anodically bonded to a structural layer and an upper electrode layer is eutectically bonded to the structural layer with a sensing part, allowing for differential etching and metal deposition patterns to enhance sealing and reduce foreign matter interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional hermetic sealing technologies (anodic bonding, eutectic bonding) are used at wafer level, then sealing properties and bonding strength are improved, but the ability to package multiple elements at high density is limited

Engineering Contradiction:
Improvesealing propertiesVSAvoidpackaging density
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent transitions from planar packaging to three-dimensional stacked packaging by bonding multiple wafers vertically. The method stacks a first wafer, a second wafer with MEMS elements, and a third wafer in the vertical dimension, enabling high-density packaging while maintaining hermetic sealing properties through multiple bonding interfaces.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The packaging structure is segmented into multiple independent wafers (first wafer, second wafer with MEMS elements, third wafer) that are bonded together. This segmentation allows each wafer to be processed and sealed independently, then combined in a stacked configuration to achieve both high density and reliable sealing.

Inventive Principle:
Principle #1Segmentation

2Reliability

If foreign matters are attached to the element during wafer dicing, then performance stability deteriorates, but conventional packaging cannot prevent this

Engineering Contradiction:
Improveperformance stabilityVSAvoidforeign matter attachment
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent performs hermetic sealing through wafer bonding before the dicing process. By sealing the MEMS elements within the stacked wafer structure in advance, the elements are protected from foreign matter contamination that would otherwise occur during subsequent dicing operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The hermetic seal acts as a protective barrier that cushions the MEMS elements against harmful foreign matters before they can cause damage. The sealed structure prevents dust and other contaminants from reaching the sensitive elements during handling and dicing.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Speed

If high speed operation is required for angular sensors, then damping effect from air resistance deteriorates performance, but hermetic sealing is needed to minimize this

Engineering Contradiction:
Improveoperation speedVSAvoidperformance stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The stacked wafer structure creates a hermetic sealed environment that isolates the MEMS elements from external air. This inert atmosphere eliminates air resistance and damping effects, enabling high-speed operation while maintaining performance stability by preventing moisture and dust ingress.

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

4Reliability

If multiple metal layers are used in bonding processes, then alignment errors increase, but proper bonding requires precise metal layer alignment

Engineering Contradiction:
Improvebonding strengthVSAvoidalignment accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent extracts and removes the problematic intermediate metal layer that causes alignment issues. By using a direct bonding approach between the first wafer and the second wafer without requiring precise alignment of multiple metal layers, the method eliminates the source of alignment errors while maintaining bonding strength.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables effective hermetic sealing and high-density packaging of MEMS sensors, reducing the impact of external factors and foreign matter attachment, while minimizing the number of metal layers and alignment errors, thus improving performance stability and reducing manufacturing costs.

Implementation Method 1

a lower electrode layer is formed wherein a metal is deposited on a part of a lower glass substrate and a structural layer is formed by etching a silicon wafer... the structural layer is anodic bonded to an upper part of the formed lower electrode layer

Methodology Applied
Scientific EffectAnodic bonding:

Implementation Method 2

an upper electrode layer is formed by depositing a metal on an upper wafer and the upper electrode layer is eutectic bonded to the structural layer on which the sensing part is formed

Methodology Applied
Scientific EffectEutectic bonding:

Data Source

PatentUS10048286B2Wafer level package of MEMS sensor and method for manufacturing the same
Publication Date: 2018.08.14 HYUNDAI MOTOR CO LTD
  • US10048286B2 patent drawing
  • US10048286B2 patent drawing
  • US10048286B2 patent drawing

AI summary

A MEMS sensor and a manufacturing method thereof is provided: forming a lower electrode layer wherein a metal is deposited on a portion of a lower glass substrate; forming a structural layer by etching according to a pattern which is formed on an upper surface of a silicon wafer and then further etching to the same thickness as the metal which is formed on a portion of the lower electrode layer; anodic bonding the structural layer to an upper portion of the lower electrode layer formed; forming a sensing part in the structural layer by etching according to a pattern which is formed on an opposite surface of the structural layer which is not etched; and forming an upper electrode layer by depositing a metal on an upper wafer and eutectic bonding the upper electrode layer to the structural layer on which the sensing part is formed.