MEMS Substrate Etching Suppresses Silicon Grass

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Solution Overview

Problem

The formation of silicon grass during the fabrication of MEMS microphones deteriorates the performance of semiconductor devices, which is a common issue in existing MEMS device manufacturing processes.

Innovation Solution

A method involving two successive anisotropic etching processes followed by an isotropic etching process is used to form vias and cavities in the substrate, utilizing mask layers and specific etching gases to prevent the formation of silicon grass, thereby improving MEMS performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a single anisotropic etching process is used to form cavity and vias, then the process is simple and fast, but silicon grass is formed on the sidewalls deteriorating MEMS performance

Engineering Contradiction:
ImproveMEMS performanceVSAvoidetching process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The etching process is divided into two separate anisotropic etching steps: first forming vias through the substrate, then forming the cavity. This segmentation prevents silicon grass formation by avoiding the simultaneous formation of both structures in a single etching step, thereby improving MEMS performance while accepting increased process complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The vias are formed in advance before the cavity is etched. This preliminary action ensures that when the cavity etching occurs, the via structures are already in place to prevent silicon grass from forming on the cavity sidewalls, thus improving MEMS performance

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If mask layers are added to control the etching process, then silicon grass formation is suppressed, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvesilicon grass suppressionVSAvoidprocess fabrication complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

Mask layers are introduced as intermediary elements to control the etching process. The first mask layer defines via locations, and the second mask layer defines the cavity shape. These intermediaries enable precise control to suppress silicon grass formation, accepting increased fabrication complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Different mask layers are applied to different regions: the first mask layer protects areas where vias should be formed, while the second mask layer protects areas where the cavity should be etched. This local differentiation enables precise silicon grass suppression through targeted protection

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively suppresses the formation of silicon grass, enhancing the performance of semiconductor devices and allowing for easy integration into existing CMOS processes, providing competitive advantages.

Implementation Method 1

A first anisotropic etching process is performed to remove a portion of the substrate from the second surface of the substrate and thereby form a plurality of vias in the substrate

Methodology Applied
Scientific EffectAnisotropic etching:

Implementation Method 2

An isotropic etching process is performed to the cavity and the remaining vias

Methodology Applied
Scientific EffectIsotropic etching:

Data Source

PatentUS8981501B2Semiconductor device and method of forming the same
Publication Date: 2015.03.17 UNITED MICROELECTRONICS CORP
  • US8981501B2 patent drawing
  • US8981501B2 patent drawing
  • US8981501B2 patent drawing

AI summary

A method of forming a semiconductor device is disclosed. Provided is a substrate having at least one MOS device, at least one metal interconnection and at least one MOS device formed on a first surface thereof. A first anisotropic etching process is performed to remove a portion of the substrate from a second surface of the substrate and thereby form a plurality of vias in the substrate, wherein the second surface is opposite to the first surface. A second anisotropic etching process is performed to remove another portion of the substrate from the second surface of the substrate and thereby form a cavity in the substrate, wherein the remaining vias are located below the cavity. An isotropic etching process is performed to the cavity and the remaining vias.