MEMS Through-Substrate Vias for Die Size Reduction
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Solution Overview
Problem
Microelectromechanical Systems (MEMS) devices with capacitive-sensing capabilities face challenges in die size and manufacturing costs due to the need for bond pad shelves, which restrict their compatibility with Chip Scale Packaging (CSP) processes and require wire bonding for electrical connections.
Innovation Solution
The fabrication method involves the use of Through-Substrate Vias (TSVs) to eliminate the need for bond pad shelves, allowing electrical signals to be routed directly between sense electrodes and bond pads on the backside of the MEMS substrate, enabling hermetic sealing with 'dumb caps' and facilitating CSP and Redistributed Chip Packaging (RCP) processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bond pad shelves are used to support bond pads, then wire bonding can be performed for electrical connections, but die size increases and compatibility with Chip Scale Packaging is lost
Solution Approach 1:
The patent moves bond pads from the top surface (requiring bond pad shelves) to the bottom surface of the substrate through Through-Substrate Vias. This dimensional relocation eliminates the need for lateral bond pad shelves, reducing die size while maintaining electrical connection capability through the via structure that penetrates the substrate thickness dimension.
Solution Approach 2:
Through-Substrate Vias act as intermediary structures that provide electrical connection pathways through the substrate. Instead of using bond pad shelves as intermediaries on the top surface, the vias create direct vertical connection paths, enabling bottom-side bonding and eliminating the space-consuming shelf structure.
2Ease of manufacture
If bond pad shelves are used, then wire bonding is required for electrical connections, but manufacturing complexity and costs increase
Solution Approach 1:
The patent extracts the bond pad function from the top surface structure (bond pad shelves) and relocates it to the bottom surface through Through-Substrate Vias. This extraction eliminates the complex shelf formation processes and enables simpler bottom-side bonding operations, reducing overall manufacturing complexity.
Solution Approach 2:
Instead of the conventional approach of forming bond pads on top surfaces with shelves and performing wire bonding from above, the patent inverts the approach by forming Through-Substrate Vias and creating bond pads on the bottom surface, enabling bonding operations to be performed from the opposite direction with simplified processes.
3Adaptability or versatility
If bond pad shelves are used, then hermetic sealing with dumb caps is not possible, but packaging flexibility is reduced
Solution Approach 1:
By relocating electrical connections to the bottom surface through vias, the top surface becomes available for hermetic sealing with dumb caps. This dimensional reorganization enables packaging options that were previously incompatible with top-side bond pad shelves, including Chip Scale Packaging and Redistributed Chip Packaging configurations.
Data Source
AI summary
Methods for the fabrication of a Microelectromechanical Systems (“MEMS”) devices are provided, as are MEMS devices. In one embodiment, the MEMS device fabrication method includes forming at least one via opening extending into a substrate wafer, depositing a body of electrically-conductive material over the substrate wafer and into the via opening to produce a via, bonding the substrate wafer to a transducer wafer having an electrically-conductive transducer layer, and forming an electrical connection between the via and the electrically-conductive transducer layer. The substrate wafer is thinned to reveal the via through a bottom surface of the substrate wafer, and a backside conductor is produced over a bottom surface of the substrate wafer electrically coupled to the via.