Microelectromechanical Tunable Inductor Parallel Coils
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Solution Overview
Problem
The integration of high-Q inductors on silicon ICs for RF applications is hindered by parasitic effects and lossy substrate interactions, leading to low quality factors and the need for off-chip inductors, which are bulky and inefficient.
Innovation Solution
A tunable inductor design featuring a pair of coils arranged parallel to the substrate, which can be electrostatically unrolled to change inductance, utilizing a layer of compressively-stressed silicon dioxide and tensile-stressed silicon nitride to create an in-plane stress gradient, allowing for low-power digital tuning through voltage control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If disk-shaped coils are wound perpendicular to the substrate, then inductance is achieved, but eddy currents and skin effects increase losses and AC resistance
Solution Approach 1:
The patent inverts the conventional coil orientation by winding the coils parallel to the substrate surface rather than perpendicular to it. This fundamental geometric inversion eliminates eddy currents in the substrate and reduces skin effects, thereby decreasing energy loss while maintaining inductance functionality.
Solution Approach 2:
The patent transitions from a vertical coil configuration (perpendicular to substrate) to a horizontal configuration (parallel to substrate). This dimensional change in coil orientation fundamentally alters the current path and magnetic field distribution, eliminating the harmful eddy current effects that occur in the perpendicular arrangement.
2Volume of moving object
If inductors are integrated on silicon IC chips, then device size and manufacturing cost are reduced, but parasitic effects and substrate losses decrease quality factor
Solution Approach 1:
The patent extracts the inductor structure from the conventional vertical configuration that causes substrate losses and repositions it horizontally parallel to the substrate. This extraction of the inductor from its problematic vertical integration mode eliminates the parasitic coupling with the lossy silicon substrate, maintaining high quality factor while achieving on-chip integration.
Solution Approach 2:
The patent applies a specialized horizontal coil geometry localized to the chip surface, creating a region with optimized electromagnetic characteristics. This local structural modification allows the inductor to operate with high quality factor by preventing substrate losses in the specific region where the coil is positioned, while the rest of the chip maintains standard integration.
3Reliability
If off-chip inductors are used, then high performance is achieved, but parasitic effects, size, and losses increase
Solution Approach 1:
The patent merges the inductor with the silicon IC chip by integrating the horizontal coil structure directly onto the chip surface. This consolidation eliminates the need for separate off-chip inductor components, reducing overall device size and eliminating interconnection losses while maintaining the high performance characteristics through the optimized horizontal geometry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves a wide variation in inductance with low electrical power consumption, reducing parasitic effects and improving RF performance by eliminating the need for off-chip components, while maintaining compact size.
Implementation Method 1
The coiling in the tunable inductor is due to a layer of a compressively-stressed material (e.g. silicon dioxide) and a layer of a tensile-stressed material (e.g. silicon nitride) which are laminated together to form the coils.
Implementation Method 2
a layer of a compressively-stressed material (e.g. silicon dioxide) and a layer of a tensile-stressed material (e.g. silicon nitride) which are laminated together to form the coils
Implementation Method 3
The inductance of the tunable inductor can be changed by applying a voltage between the first and second electrodes. This partially or completely uncoils (i.e. unrolls) the pair of coils with the exact extent of uncoiling depending upon an applied voltage.
Implementation Method 4
The electrical power required to tune the inductor of the present invention is low since tuning is accomplished electrostatically, and not by resistive current heating.
Data Source
AI summary
A microelectromechanical tunable inductor is formed from a pair of substantially-identically-sized coils arranged side by side and coiled up about a central axis which is parallel to a supporting substrate. An in-plane stress gradient is responsible for coiling up the coils which. The inductance provided by the tunable inductor can be electrostatically changed either continuously or in discrete steps using electrodes on the substrate and on each coil. The tunable inductor can be formed with processes which are compatible with conventional IC fabrication so that, in some cases, the tunable inductor can be formed on a semiconductor substrate alongside or on top of an IC.