MEMS Wafer-Level Packaging for IR Detector Thermal Management

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Solution Overview

Problem

Hermetically sealed thermopile sensor packages are expensive and difficult to fabricate in large volumes, and the fragile dielectric membranes in thermopile sensors pose challenges during mechanical dicing processes, while existing packaging methods fail to effectively control thermal conductivity and minimize thermal gradients.

Innovation Solution

A wafer-level thermal sensor package is fabricated using MEMS processes, featuring a thermopile stack with a dielectric membrane, thermoelectric layers, a metal connection assembly, and a cap wafer assembly that creates a hermetically sealed vacuum environment, reducing thermal conductivity and protecting fragile membranes during dicing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional hermetic sealing methods are used for thermopile sensor packages, then sealing reliability is improved, but manufacturing cost increases and large-volume fabrication becomes difficult

Engineering Contradiction:
Improvesealing reliabilityVSAvoidmanufacturing cost and scalability
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent replaces traditional mechanical hermetic sealing methods with a MEMS-based wafer-level packaging approach. The MEMS device integrates the thermopile sensor with a sealed cavity formed through semiconductor fabrication processes, eliminating the need for post-fabrication hermetic sealing operations. This substitution enables cost-effective large-volume production while maintaining sealing integrity through the integrated MEMS structure.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent merges the sensor fabrication process with the packaging process by integrating the thermopile sensor directly into the MEMS device structure. The sensor elements, interconnects, and sealed cavity are formed in a unified wafer-level manufacturing process, combining what were traditionally separate steps into a single integrated fabrication flow that enables high-volume production.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If mechanical dicing processes are used to separate sensors, then production efficiency is improved, but fragile dielectric membranes are damaged

Engineering Contradiction:
Improveproduction efficiencyVSAvoidmembrane integrity
Core Design Contradiction:
ProductivityVSStrength

Solution Approach 1:

The patent applies beforehand cushioning by forming a protective sacrificial layer beneath the fragile dielectric membrane during fabrication. This sacrificial layer acts as a mechanical cushion that prevents direct contact between the membrane and the dicing blade, absorbing cutting forces and preventing membrane damage during the mechanical dicing process while enabling high-speed production.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The patent introduces a sacrificial layer as an intermediary element between the fragile dielectric membrane and the dicing blade. This intermediary layer absorbs the mechanical stress of the dicing process, protecting the membrane from direct contact and damage while allowing efficient mechanical separation of the sensors.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If conventional packaging methods are used, then manufacturing simplicity is maintained, but thermal conductivity control and thermal gradient minimization are insufficient

Engineering Contradiction:
Improvepackaging structure complexityVSAvoidthermal conductivity control
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by creating a vacuum environment specifically within the sealed cavity of the MEMS device, while the rest of the package structure remains conventional. This localized vacuum region provides precise thermal conductivity control for the thermopile sensor without requiring the entire packaging system to be complex, achieving thermal management precision where needed while maintaining overall manufacturing simplicity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a cost-effective, hermetically sealed environment that controls thermal conductivity, enhances sensitivity, and minimizes thermal gradients, while protecting fragile membranes during dicing, resulting in improved accuracy and reduced packaging costs.

Implementation Method 1

a cap wafer assembly coupled to the thermopile stack, the cap wafer assembly including a wafer having a cavity formed on a side of the wafer configured to be adjacent to the thermopile stack

Methodology Applied
Scientific EffectVacuum: Vacuum

Implementation Method 2

A thermopile sensor is an electronic device that converts thermal energy into electrical energy. These sensors may utilize several connected thermocouples to generate an output voltage proportional to a local temperature difference

Methodology Applied
Scientific EffectThermoelectric effect: Seebeck Effect

Data Source

PatentUS10439118B2MEMS-based wafer level packaging for thermo-electric IR detectors
Publication Date: 2019.10.08 MAXIM INTEGRATED PROD INC
  • US10439118B2 patent drawing
  • US10439118B2 patent drawing
  • US10439118B2 patent drawing

AI summary

A device and techniques for fabricating the device are described for forming a wafer-level thermal sensor package using microelectromechanical system (MEMS) processes. In one or more implementations, a wafer level thermal sensor package includes a thermopile stack, which includes a substrate, a dielectric membrane, a first thermoelectric layer, a first interlayer dielectric, a second thermoelectric layer, a second interlayer dielectric, a metal connection assembly, a passivation layer, where the passivation layer includes at least one of a trench or a hole, and where the substrate includes a cavity adjacent to the at least one trench or hole, and a bond pad disposed on the passivation layer and electrically coupled to the metal connection assembly; and a cap wafer assembly coupled to the thermopile stack, the cap wafer assembly including a wafer having a cavity formed on a side of the wafer configured to be adjacent to the thermopile stack.