MEMS Wiring Board Bent Flank Etching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional methods for manufacturing MEMS switching elements often result in incomplete sealing of the space containing the movable electrode due to the formation of an inverted-mesa structure during wet etching, leading to potential leaks and unreliable hermetic sealing.
Innovation Solution
The method involves forming a metal thin film on a substrate with a photomask pattern that includes bent flanks in the junction areas, slowing down the etching rate and preventing the formation of an inverted-mesa structure, allowing the fritted glass to completely fill the gaps and ensure reliable sealing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional wet etching is used to form wiring patterns, then the etching process is simple and fast, but inverted-mesa structures form at junction areas causing incomplete sealing
Solution Approach 1:
The patent applies preliminary action by forming a relief structure (protrusion) on the wiring pattern at the junction area before etching. This relief structure is created during the wiring formation stage, preemptively preparing the surface topology to control subsequent etching behavior and prevent inverted-mesa formation.
Solution Approach 2:
The patent applies local quality by creating a non-uniform wiring pattern with a relief structure specifically at the junction area where sealing is critical. The wiring has different geometries in different regions: a protrusion at the junction area to control etching, and standard geometry elsewhere to maintain electrical functionality.
2Productivity
If the etching rate is high to improve manufacturing efficiency, then productivity increases, but the inverted-mesa structure forms more readily compromising seal reliability
Solution Approach 1:
The relief structure creates local geometric variation that modifies etching behavior specifically at the junction area. The protrusion causes the etchant to contact the wiring surface at different points, creating a self-regulating effect that prevents uniform over-etching and inverted-mesa formation even when overall etching rates are high.
Solution Approach 2:
The patent changes the geometric parameters of the wiring pattern by introducing a relief structure with specific dimensions. This modifies the local surface area and etching front geometry, creating a parameter change that suppresses inverted-mesa formation while allowing high etching rates to be maintained elsewhere.
3Ease of manufacture
If standard flat wiring patterns are used, then manufacturing is simpler, but fritted glass cannot completely fill gaps at junction areas
Solution Approach 1:
The relief structure is formed in advance during the wiring fabrication process, before the fritted glass filling step. This preliminary geometric modification prepares the junction area to receive and retain fritted glass, ensuring complete gap filling without requiring complex subsequent processing.
Solution Approach 2:
The relief structure creates a localized geometric feature at the junction area that enhances fritted glass accumulation. The protrusion provides a physical barrier and increased surface area that promotes complete gap filling, while the rest of the wiring pattern remains simple and flat for ease of manufacture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents the formation of inverted-mesa structures, ensuring complete sealing of the space above the wiring board, enhancing the reliability of the MEMS switching elements by maintaining a consistent etching process and preventing gas leaks.
Implementation Method 1
a third step of selectively removing the metal thin film by wet etching, with said resist pattern as a mask
Implementation Method 2
a space above a surface area containing at least a part of said wiring is subject to sealing by a lid and a binder for joining said lid, said substrate, and said wiring
Data Source
AI summary
A circuit element comprises a wiring board; the wiring board comprises a substrate and a wiring formed on the substrate, and a lid joined on the substrate containing a part of the wiring with a binder and making a sealed space above the substrate, wherein if a spot of the wiring joined with the lid by a binder is a spot of junction, a flank of both flanks of the wiring comprise bends in the spot of junction.


