MEOL Via Depth Control Using Contact Etch Stop Layers
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Solution Overview
Problem
In semiconductor manufacturing, particularly during mid-end-of-line (MEOL) processes, it is challenging to control via etching depth uniformly across areas with different via densities, leading to variations in via depth that can cause leakage and device defects.
Innovation Solution
A method is introduced that involves forming a semiconductor device by partially recessing a dielectric layer, depositing additional dielectric layers, and using contact etch stop and inter-layer dielectric layers to control etching processes, ensuring consistent via depth across areas with varying gate and via pitches, thereby preventing unintended exposure of gate stacks and maintaining structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If via etching is performed in areas with different via densities, then gate via holes are formed in both dense and isolated via areas, but via depth varies from one area to another leading to leakage concerns
Solution Approach 1:
The patent applies local quality by introducing a contact etch stop layer selectively in dense via areas where via depth control is critical. This layer creates different etching conditions in different regions of the substrate, allowing precise control of via depth in high-density areas while maintaining standard etching in isolated via areas. The etch stop layer acts as a depth marker that prevents over-etching in dense via regions.
Solution Approach 2:
The contact etch stop layer serves as an intermediary element between the etching process and the underlying structures. It mediates the etching process by providing a controlled stopping point, ensuring that via etching depth is consistent across different via densities. This intermediary layer enables the etching process to adapt to varying local conditions without compromising overall via depth uniformity.
2Reliability
If gate contacts and source/drain contacts are formed after via etching, then electrical connections are established, but leakage occurs due to via depth variation
Solution Approach 1:
The contact etch stop layer provides localized protection in dense via areas, creating different electrical isolation conditions in different regions. This ensures that gate contacts and source/drain contacts are formed at consistent depths relative to the etch stop layer, preventing leakage paths that would occur with variable via depths. The local quality modification ensures reliable electrical connections without leakage concerns.
3Manufacturing precision
If additional dielectric layers are deposited and etching processes are controlled, then via depth consistency is achieved across different via pitches, but process complexity increases
Solution Approach 1:
The contact etch stop layer is deposited in advance, before the via etching process begins. This preliminary action establishes a predetermined depth marker that guides the etching process. By preparing this reference layer beforehand, the subsequent etching process becomes simpler and more controlled, as the etch stop layer automatically provides the depth reference without requiring complex real-time monitoring or adjustment mechanisms.
Data Source
AI summary
A semiconductor device includes a first conductive structure directly over an isolation structure; a second conductive structure directly over an active region; a first dielectric layer over the first and second conductive structures; a second dielectric layer over the first dielectric layer, wherein the first and second dielectric layers include different materials; a first conductive feature contacting the first conductive structure through at least the first and second dielectric layers; and a second conductive feature contacting the second conductive structure through at least the first and second dielectric layers, wherein the first and second conductive features include a same metal.