3D Non-Volatile Memory Merge Driver for Charge Leakage Reduction

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Solution Overview

Problem

Semiconductor memory devices face challenges in reducing boosting charge leakage, which affects the efficiency and reliability of operations in flash memory systems.

Innovation Solution

A three-dimensional (3D) non-volatile memory device is designed with a merge driver that applies a merge voltage at the same level to a common source line and a bulk in the memory cell array during read, program, and erase operations, eliminating the need for separate bulk and common source line drivers, thereby reducing charge leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate bulk and common source line drivers are used, then better control of voltage levels can be achieved, but device complexity increases

Engineering Contradiction:

Improvevoltage controlVSAvoiddriver structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the bulk driver and common source line driver into a single merged driver that applies the same voltage level to both the bulk and common source line simultaneously. This merging eliminates the need for separate driver circuits while maintaining proper voltage control, thereby reducing device complexity without sacrificing voltage control reliability.

Inventive Principle:

Principle #5Merging (Combining)

2Device complexity

If a merged driver is used to reduce device complexity, then charge leakage increases due to unoptimized voltage control

Engineering Contradiction:

Improvedriver structureVSAvoidcharge leakage

Core Design Contradiction:

Device complexityVSLoss of energy

Solution Approach 1:

The merged driver dynamically adjusts voltage parameters based on operation type: applying ground voltage during read/program operations to minimize charge leakage, and erase voltage during erase operations. This parameter optimization ensures that even with a merged driver structure, charge leakage is effectively controlled by changing voltage levels according to operational requirements.

Inventive Principle:

Principle #35Parameter changes

3Loss of energy

If ground voltage is applied to common source line and bulk during read/program operations, then charge leakage is reduced, but erase operation capability is affected

Engineering Contradiction:

Improvecharge leakageVSAvoidoperation modes

Core Design Contradiction:

Loss of energyVSAdaptability or versatility

Solution Approach 1:

The merged driver dynamically switches between different voltage modes based on the operation being performed: ground voltage mode during read and program operations to reduce charge leakage, and erase voltage mode during erase operations to enable proper erase functionality. This dynamic adaptation allows the system to optimize for charge leakage reduction when needed while maintaining full operational versatility across all memory operations.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS9036425B2Memory devices for reducing boosting charge leakage and systems including the same

Publication Date: 2015.05.19 SAMSUNG ELECTRONICS CO LTD

AI summary

A three-dimensional (3D) non-volatile memory includes a memory cell array and a merge driver configured to apply a merge voltage at the same level to a common source line and a bulk in the memory cell array.