Merged Non-Linear Clock Signals for Display Driver ICs

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Solution Overview

Problem

Conventional active matrix display technologies face inefficiencies due to lower electron mobility and larger threshold voltage shifts in amorphous silicon TFTs, and require multiple clock signals and pins for each color in display panels, leading to increased complexity and power consumption.

Innovation Solution

A digital architecture that merges non-linear emission clock signals for display panels, using a single merged clock signal to represent multiple color-specific clock signals, reducing the number of clock signals and pins needed, and employing micro-driver chips with digital or hybrid unit cells to replace TFTs, which are fabricated using MOSFET processing techniques on single crystalline silicon.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple color-specific clock signals are used for each display element, then precise control of emission timing for different colors is achieved, but device complexity and pin count increase

Engineering Contradiction:
Improveemission timing control precisionVSAvoidclock signal routing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges multiple color-specific clock signals (e.g., red, green, blue) into a single multi-phase clock signal. Each phase of the merged clock corresponds to a specific color, allowing precise control of emission timing for different colors while reducing the number of clock signal lines and pins required at each display element.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single merged clock signal serves multiple functions by providing timing control for multiple colors simultaneously. Instead of requiring separate dedicated clock lines for each color, one universal clock signal with multiple phases performs the timing control for all color channels, reducing routing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of manufacture

If amorphous silicon TFTs are used for switching devices, then large-area fabrication in low temperature process is achieved, but electron mobility is reduced

Engineering Contradiction:
Improvefabrication easeVSAvoidelectron mobility
Core Design Contradiction:
Ease of manufactureVSSpeed

Solution Approach 1:

The patent changes the material parameter from amorphous silicon to low temperature polysilicon (LTPS). This material substitution maintains the advantage of low temperature processing and large-area fabrication capability while significantly improving electron mobility, as LTPS has higher carrier mobility due to its crystalline structure.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If multiple clock signals are used for each color, then accurate gray scale control is achieved, but power consumption increases

Engineering Contradiction:
Improvegray scale control precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

By merging multiple color-specific clock signals into a single multi-phase clock signal, the patent reduces the total number of clock signals driving the display elements. This reduction in signal lines directly lowers dynamic power consumption while maintaining accurate gray scale control through the phased timing structure of the merged clock.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10283037B1Digital architecture with merged non-linear emission clock signals for a display panel
Publication Date: 2019.05.07 APPLE INC
  • US10283037B1 patent drawing
  • US10283037B1 patent drawing
  • US10283037B1 patent drawing

AI summary

Systems and apparatuses provide a digital architecture with merged non-linear emission clocks for a display panel. In one embodiment, a display driver hardware circuit includes decoder logic to store a mapping between a plurality of non-linear gray scale clock signals and a merged non-linear gray scale clock signal that represents a combination of the plurality of non-linear gray scale clock signals including first and second non-linear gray scale clock signals. In one example, the first non-linear gray scale clock signal is associated with at least one display element of a first color and the second non-linear gray scale clock signal is associated with at least one display element of a second color. A driver circuitry is coupled to the decoder logic. The driver circuitry includes a counter to store a number of pulses of the merged non-linear gray scale clock signal and driving circuitry to cause emission of the at least one display element of a first color based on the first non-linear gray scale clock signal.