Merkle Tree Fast Write for Secure Host Memory Buffer
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Solution Overview
Problem
The existing validation process for writing data to a Merkle Tree in data storage devices, such as solid state drives, is inefficient due to high latency caused by calculating and comparing hashes, making it vulnerable to security attacks like replay and playback attacks.
Innovation Solution
A data storage device with a controller configured to set decoders and encoders in data and hash modes to generate and update hashes efficiently, allowing parallel validation and write operations, thereby reducing latency and enhancing security.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the controller implements a Merkle Tree with validation process (calculating hashes and comparing root hash), then security of the HMB is improved, but write latency increases
Solution Approach 1:
The patent segments the hash calculation process into multiple parallel operations using separate decoder and encoder paths. The decoder calculates hashes from stored data while the encoder calculates hashes from new data simultaneously, dividing the validation and write operations into independent parallel segments that reduce overall latency
Solution Approach 2:
The patent performs preliminary hash calculations in parallel before the final validation comparison. The decoder pre-calculates hashes from stored HMB data and the encoder pre-calculates hashes from new data simultaneously, so that when validation is needed, the hash values are already prepared, reducing the critical path latency
2Reliability
If the controller performs sequential hash calculation and validation, then security is maintained, but power consumption increases due to repeated operations
Solution Approach 1:
The patent maintains continuous useful action by keeping both the decoder and encoder operating in parallel throughout the validation and write process. Rather than sequentially switching between validation and write modes, both operations proceed simultaneously with continuous hash calculations, eliminating idle cycles and reducing total power consumption
Solution Approach 2:
The patent dynamically switches the decoder between data mode and hash mode, and the encoder between data mode and hash mode, based on operational needs. This dynamic reconfiguration allows the same hardware resources to be efficiently utilized for multiple functions simultaneously, reducing overall power consumption while maintaining data integrity
Data Source
AI summary
A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to set a decoder in data mode, read host memory buffer data and hashes from a host memory buffer, generate a first calculated hash, set the decoder in hash mode, generate a second calculated hash, and determine whether the second calculated hash is the same as a root hash. The controller is further configured to set an encoder in data mode, generate a first new hash, write new data and the first new hash to a host memory buffer, set the encoder to hash mode, calculate a second new hash, and update a root hash with the second new hash.