Mesa Transistor Bump Layout for Heat Dissipation and Stress Relief
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Solution Overview
Problem
The existing semiconductor devices with bumps on mesa structures face reduced reliability due to stress-induced degradation, which affects the heat dissipation performance and overall reliability of the transistors.
Innovation Solution
A semiconductor device design featuring a first bump overlapping transistors with a unique orientation and distance configuration relative to a second bump, where the first bump extends parallel to the substrate and the second bump is positioned orthogonally, reducing stress concentrations by varying the distances between bump sides and transistor end portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the bump overlaps the entire region of the mesa structure, then heat dissipation performance is improved, but the characteristics of the transistor are degraded due to stress applied by the bump
Solution Approach 1:
The patent applies asymmetry by positioning the bump such that the distance from the first side of the bump to the first end portion of the mesa structure (first distance) is greater than the distance from the second side of the bump to the second end portion (second distance). This asymmetric configuration allows the bump to overlap substantially the entire region of the mesa structure for improved heat dissipation, while the varied distances reduce stress concentration on the mesa structure, thereby maintaining transistor characteristics and reliability.
2Loss of energy
If the bump overlaps the entire region of the mesa structure, then thermal resistance is reduced, but stress applied by the bump degrades transistor characteristics
Solution Approach 1:
The asymmetric positioning of the bump relative to the mesa structure end portions allows maximum overlap for minimized thermal resistance while the unequal distances (first distance greater than second distance) create a stress distribution pattern that prevents excessive stress concentration, thereby preserving transistor strength and characteristics.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate; at least one first transistor, each first transistor including a mesa structure including one or more semiconductor layers; a first bump overlapping the first transistors and extending in a first direction; and a second bump. The mesa structure includes a first end portion at one end in a second direction and a second end portion at another end in the second direction. In plan view, an outer periphery of the first bump includes a first side and a second side extending in the first direction and arranged next to each other in the second direction. The first side is closer to the second bump than the second side in the second direction. The first end portion and the second end portion of the mesa structure are between the first side and the second side.