Mesa Semiconductor Structure for Carrier Lifetime Adjustment
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Solution Overview
Problem
Current semiconductor devices face challenges in effectively adjusting carrier lifetimes in semiconductor substrates, particularly in regions like the first lifetime adjustment region, which affects reverse recovery time and reverse recovery loss, due to limitations in implanting charged particles like helium to create recombination centers.
Innovation Solution
The semiconductor device incorporates a first lifetime adjustment region formed by implanting charged particles such as helium ions into the semiconductor substrate to create lattice defects, which act as recombination centers, thereby adjusting carrier lifetimes and improving characteristics like reverse recovery time and reverse recovery loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If charged particles such as helium are implanted into the semiconductor substrate to form a lifetime adjustment region, then carrier lifetime can be adjusted and reverse recovery characteristics can be improved, but the manufacturing complexity and process difficulty increase
Solution Approach 1:
The patent applies preliminary action by forming the lifetime adjustment region through charged particle implantation before final device fabrication steps. This allows carrier lifetime to be pre-adjusted in the semiconductor substrate, enabling better control of reverse recovery characteristics in subsequent device operations without requiring complex post-processing adjustments
Solution Approach 2:
The patent utilizes parameter changes by varying the implantation conditions (energy, dose, depth) of charged particles to precisely control the depth and concentration profile of the lifetime adjustment region. This enables fine-tuning of carrier lifetime parameters to achieve optimal reverse recovery characteristics for different device applications
2Loss of time
If charged particles are implanted to create recombination centers, then reverse recovery time is reduced, but the precision and control of the implantation process become more challenging
Solution Approach 1:
The patent replaces mechanical drilling or physical methods with charged particle implantation to create recombination centers. This substitution enables more precise control over the depth and distribution of lifetime adjustment regions, as ion implantation processes can be precisely controlled through acceleration voltage and dosage parameters, achieving better manufacturing precision than mechanical alternatives
Solution Approach 2:
The patent employs periodic action through multi-step implantation processes where charged particles are implanted in multiple passes with different energies and doses. This allows building up the desired concentration profile incrementally, improving precision by controlling each implantation step separately and adjusting parameters between steps to achieve the target reverse recovery time
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively adjusts carrier lifetimes, enhancing the performance of semiconductor devices by reducing reverse recovery time and loss, while also allowing for the adjustment of characteristics such as leakage current and threshold voltage.
Implementation Method 1
a first lifetime adjustment region formed by implanting charged particles such as helium ions into the semiconductor substrate to create lattice defects
Data Source
AI summary
Provided is a semiconductor device including one or more first mesa portions, each of which is provided with a first lifetime adjustment region and has a first contact portion in contact with an upper electrode, and one or more second mesa portions, each of which is not provided with the first lifetime adjustment region and has a second contact portion in contact with the upper electrode, and a first depth position of the first contact portion of at least one of the one or more first mesa portions is provided at a position deeper than a second depth position of the second contact portion of at least one of the one or more second mesa portions with respect to an upper surface of a semiconductor substrate.


