Mesa Emitter Width Variation for IGBT Saturation Current
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Solution Overview
Problem
Conventional semiconductor devices, such as IGBTs, face challenges in optimizing the variance of saturation current and latch-up resistance, which affects their performance and reliability.
Innovation Solution
The semiconductor device incorporates a specific structure with a semiconductor substrate featuring a drift region, gate trench portions, dummy trench portions, and mesa portions with alternating emitter and conductivity type regions, optimized in width and doping concentration to enhance saturation current and latch-up resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the emitter region width varies to optimize current characteristics, then saturation current improves, but manufacturing precision requirements increase
Solution Approach 1:
The emitter region width variation is implemented through segmented formation processes. By dividing the emitter formation into multiple steps with different width specifications at different locations (wider near gate trench, narrower near dummy trench), the design achieves the desired width profile while using standard semiconductor fabrication techniques, thereby managing manufacturing precision requirements.
Data Source
AI summary
A semiconductor device including: a semiconductor substrate; a first gate trench portion and a dummy trench portion provided from an upper surface of the semiconductor substrate to a drift region, extending in the extending direction; a first transistor mesa portion sandwiched by the first gate trench portion and dummy trench portion; a base region contacting with the first gate trench portion above the drift region; an emitter region contacting with the same on the semiconductor substrate upper surface; and a second conductivity type region exposed on the semiconductor substrate upper surface, wherein the emitter region and second conductivity type region are arranged alternately in the extending direction; and the emitter region width in the extending direction contacting with the first gate trench portion is greater than the second conductivity type region width in the extending direction contacting with the same, will be provided.