Trench Mesa Semiconductor Layout for Lower Turn-On Loss
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Solution Overview
Problem
Semiconductor devices, such as IGBTs, face challenges in reducing turn-on losses due to high displacement currents and increased ON voltage, which are not effectively addressed by existing technologies.
Innovation Solution
The semiconductor device incorporates a floating region with a higher doping concentration than the accumulation regions, strategically positioned below the accumulation regions and in contact with the gate trench portion, to divert electron current and reduce displacement currents, thereby minimizing turn-on losses and maintaining a favorable trade-off between ON voltage and turn-off loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional structures without floating regions are used, then device simplicity is maintained, but turn-on losses increase due to high displacement currents
Solution Approach 1:
The patent segments the drift region into multiple functional zones by introducing floating regions with different doping concentrations (first floating region with 1×10^19 to 1×10^20 atoms/cm³ and second floating region with 5×10^18 to 1×10^19 atoms/cm³). This segmentation allows different portions to handle displacement currents at different stages of turn-on, reducing overall turn-on losses while maintaining manageable structural complexity through systematic zoning.
Solution Approach 2:
The patent applies local quality by creating regions with spatially varying doping concentrations within the drift region. The floating regions are strategically positioned and doped at different concentrations to locally optimize displacement current suppression at specific depths, while the overall structure remains integrated. This localized optimization reduces turn-on losses without requiring complete restructuring of the entire device.
2Loss of energy
If floating regions with higher doping concentrations are introduced, then displacement currents are reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent specifies concrete parameter ranges for the floating regions (first floating region: 1×10^19 to 1×10^20 atoms/cm³, second floating region: 5×10^18 to 1×10^19 atoms/cm³) to optimize displacement current suppression. These parameter definitions provide clear manufacturing targets while allowing sufficient tolerance ranges, balancing the need for precision with practical manufacturability. The doping concentrations are chosen to be distinctly different from surrounding regions, enabling verification through standard measurement techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of a floating region with a higher doping concentration effectively reduces turn-on losses and displacement currents, leading to a more efficient semiconductor device with improved performance characteristics.
Implementation Method 1
a second-conductivity-type floating region provided in the mesa portion below the accumulation regions and in contact with the gate trench portion, and provided in a part of the mesa portion in the array direction
Data Source
AI summary
A semiconductor device is provided, including: a semiconductor substrate; a first-conductivity-type drift region provided in the semiconductor substrate; a trench portion provided from an upper surface of the semiconductor substrate to an inside of the semiconductor substrate, and extending in a predetermined extending direction in a plane of the upper surface of the semiconductor substrate; a mesa portion provided in contact with the trench portion in an array direction orthogonal to the extending direction; a second-conductivity-type base region provided in the mesa portion above the drift region and in contact with the trench portion; and a second-conductivity-type floating region provided in the mesa portion below the base region, in contact with the trench portion, and provided in at least a part of the mesa portion in the array direction.