Semiconductor Mesa Groove Recess Structure for Electric Field Relaxation
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving high breakdown voltage due to electric field concentration at the pn junction interface, particularly in vertical semiconductor devices, where the breakdown voltage does not reach design values despite the use of field plate and guard ring structures.
Innovation Solution
A semiconductor device structure is developed with a mesa groove and recess groove configuration in the terminal region, featuring an electric field relaxation region with a low carrier concentration p-type layer, which is formed by ion implantation, allowing for a gradual carrier concentration increase towards the first layer, thereby improving breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a field plate structure or guard ring structure is formed in the terminal region, then the breakdown voltage is improved, but the electric field concentration at the pn interface remains insufficiently relaxed
Solution Approach 1:
The patent applies local quality by creating an electric field relaxation region with specifically lowered carrier concentration only in the terminal region where it is needed, while maintaining normal carrier concentration in the device region. This is achieved through selective ion implantation or epitaxial growth that modifies the electrical properties locally at the terminal region without affecting the overall device structure.
Solution Approach 2:
The patent changes the carrier concentration parameter in the terminal region by forming an electric field relaxation region with lower carrier concentration than the surrounding areas. This parameter change transforms the electrical characteristics of the terminal region, enabling it to relax electric field concentration and improve breakdown voltage through controlled modification of the semiconductor material properties.
2Reliability
If the second layer is thinned to form an electric field relaxation region, then the breakdown voltage is improved, but the structural complexity increases due to additional grooves and layers
Solution Approach 1:
The patent segments the terminal region into distinct functional zones including a mesa groove, a recess groove, and an electric field relaxation region. This segmentation allows each component to perform its specific function: the mesa groove provides mechanical support and defines the terminal boundary, the recess groove creates the thinned region for field relaxation, and the low carrier concentration region enhances breakdown characteristics.
Solution Approach 2:
The patent implements a nested structure where the recess groove is positioned within the terminal region defined by the mesa groove, and the electric field relaxation region is formed within the thinned semiconductor layer created by the recess groove. This nested arrangement allows multiple functional regions to be integrated in a compact configuration, reducing overall device complexity while maintaining the necessary electric field relaxation functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure significantly enhances breakdown voltage by effectively relaxing electric field concentration at the pn interface, allowing for improved performance and reliability in semiconductor devices, especially those made from Group III nitride semiconductors.
Implementation Method 1
a depletion layer is formed at a pn junction between the electric field relaxation region and the n-type layer, and equipotential lines are uniformly distributed on the terminal side in the depletion layer, thereby relaxing the electric field concentration
Implementation Method 2
The third layer having such a carrier concentration distribution can be easily formed by ion implantation
Data Source
AI summary
To improve the breakdown voltage of a semiconductor device. In a terminal region of the semiconductor device, a mesa groove, a recess groove, an electric field relaxation region, and a gradient distributed low concentration p-type layer region are formed. A recess groove is fromed between a device region and the mesa groove so as to surround the device region. A region where a p-type layer is thinned by the recess groove is the electric field relaxation region. The gradient distributed low concentration p-type layer region is formed on the surface of the electric field relaxation region. The average carrier concentration of the entire gradient distributed low concentration p-type layer region is lower than the carrier concentration of the p-type layer. By forming the gradient distributed low concentration p-type layer region, the electric field relaxation region is quickly completely depleted when a reverse voltage is applied, thereby improving the breakdown voltage.