Micro LED Mesa Isolation with Sidewall Passivation Grooves

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Solution Overview

Problem

Current optoelectronic semiconductor devices face challenges in achieving precise electrical isolation and reducing non-radiative recombination during the manufacturing of micro LEDs and photodetectors, particularly due to limitations in mesa etching processes which affect the performance and efficiency of these devices.

Innovation Solution

The proposed solution involves a semiconductor device with a semiconductor layer stack patterned to form a mesa, where a hard mask with a conductive layer protrudes from the mesa ends and a cover layer with a larger band gap than the active zone is applied over the sidewalls, allowing for anisotropic and isotropic etching to create separating grooves between adjacent devices, thereby improving electrical isolation and reducing non-radiative recombination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If mesa etching is performed to isolate individual devices, then electrical isolation is improved, but non-radiative recombination increases at the exposed sidewalls

Engineering Contradiction:
Improveelectrical isolationVSAvoidnon-radiative recombination
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

A thin film passivation layer is deposited over the exposed sidewalls of the etched mesa structure. This passivation layer acts as a protective coating that prevents non-radiative recombination at the sidewall surfaces while maintaining the electrical isolation provided by the mesa etching. The passivation layer conformally covers the sidewalls, effectively passivating the harmful surface states without compromising the isolation function.

Inventive Principle:
Principle #30Flexible shells and thin films

2Speed

If mesa etching is performed to reduce capacitance, then device speed is improved, but manufacturing precision is compromised due to alignment difficulties

Engineering Contradiction:
Improvedevice speedVSAvoidalignment precision
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

A dedicated passivation layer is introduced as an intermediary component between the mesa etching process and the subsequent device fabrication steps. This passivation layer is deposited after mesa formation and before final device assembly, serving as a protective intermediary that prevents surface degradation during handling and assembly. The passivation layer's conformal deposition ensures uniform coverage, maintaining precise dimensional relationships while protecting the etched surfaces.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If the active zone is exposed during manufacturing, then subsequent processing is simplified, but non-radiative recombination increases

Engineering Contradiction:
Improveprocessing simplicityVSAvoidnon-radiative recombination
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

A passivation layer is deposited to conformally cover the exposed active zone sidewalls. This thin film provides a protective shell that prevents non-radiative recombination at the exposed surfaces while allowing subsequent processing steps to proceed. The passivation layer can be deposited using standard semiconductor fabrication techniques, maintaining processing simplicity while eliminating the harmful effects of exposed sidewalls.

Inventive Principle:
Principle #30Flexible shells and thin films

4Reliability

If standard mesa etching is used, then device isolation is achieved, but uniformity across device arrays deteriorates

Engineering Contradiction:
Improvedevice isolationVSAvoiduniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A conformal passivation layer is deposited over all mesa sidewalls in the device array. This uniform thin film coating ensures that each device receives identical protection, eliminating variations in non-radiative recombination rates across the array. The conformal deposition process maintains consistent thickness and composition across all devices, thereby improving uniformity while preserving the isolation function.

Inventive Principle:
Principle #30Flexible shells and thin films

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the precision and performance of optoelectronic semiconductor devices by reducing non-radiative recombination and improving the alignment of separating grooves, leading to more uniform and efficient electromagnetic radiation generation or detection across the device array.

Implementation Method 1

the hard mask comprises a conductive layer directly adjacent to a semiconductor layer of the semiconductor layer stack

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

the cover layer comprising a semiconductor material... A band gap of a material of the cover layer may be larger than the band gap of the active zone

Methodology Applied
Scientific EffectBand gap energy difference:

Implementation Method 3

allowing for anisotropic and isotropic etching to create separating grooves between adjacent devices

Methodology Applied
Scientific EffectAnisotropic etching:

Implementation Method 4

allowing for anisotropic and isotropic etching to create separating grooves between adjacent devices

Methodology Applied
Scientific EffectIsotropic etching:

Data Source

PatentUS20240322069A1Optoelectronic semiconductor device, array of optoelectronic semiconductor devices and method for manufacturing an optoelectronic semiconductor device
Publication Date: 2024.09.26 AMS OSRAM INT GMBH
  • US20240322069A1 patent drawing
  • US20240322069A1 patent drawing
  • US20240322069A1 patent drawing

AI summary

In an embodiment a method for manufacturing an optoelectronic semiconductor device includes forming a semiconductor layer stack comprising an active zone for generating or receiving electromagnetic radiation, forming a hard mask layer over the semiconductor layer stack, patterning the hard mask layer to form a hard mask having a width d measured in a first lateral direction, patterning the semiconductor layer stack to form a mesa having a width w measured in the first lateral direction with d>w, wherein the hard mask protrudes from the mesa at a first lateral end and at a second lateral end of the mesa, and wherein the first lateral end and the second lateral end are arranged at opposing sides of the mesa along the first lateral direction, forming a cover layer over sidewalls of the mesa and etching the cover layer using the hard mask as an etching mask to form a separating groove.