Mesa Passivation Structure Using SIPOS to Prevent Cracking

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Conventional semiconductor devices for transient overvoltage protection, particularly those using glass passivation layers, are susceptible to cracking, which compromises their reliability and effectiveness.

Innovation Solution

The use of a semi-insulating polycrystalline silicon (SIPOS) layer as a passivation region in a multilayer semiconductor device structure, including an n-type semiconductor substrate and a p-type layer, reduces the likelihood of cracking and enhances the device's ability to withstand high blocking voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a glass passivation layer is used in a passivation area of the device, then the device provides protection against transient overvoltages, but the glass passivation layer is susceptible to cracking which compromises reliability

Engineering Contradiction:

Improvedevice reliabilityVSAvoidcracking susceptibility

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the material parameter of the passivation layer from glass to semi-insulating polycrystalline silicon (SIPOS). This material substitution fundamentally alters the mechanical and electrical properties, eliminating the cracking susceptibility inherent in glass while maintaining the passivation function and providing high blocking voltage capability.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite structure consisting of multiple layers including the SIPOS passivation layer, metal layers, and semiconductor layers. This composite material approach combines the advantages of different materials: SIPOS provides crack resistance and semi-insulating properties, while the metal layers provide conductivity and the semiconductor layers provide active device functionality.

Inventive Principle:

Principle #40Composite materials

2Strength

If a glass passivation layer is used, then the device structure is simple, but the device cannot withstand high blocking voltages effectively due to cracking

Engineering Contradiction:

Improveblocking voltage withstand capabilityVSAvoidpassivation layer structure

Core Design Contradiction:

StrengthVSDevice complexity

Solution Approach 1:

The patent changes the material parameter from glass to SIPOS, which has inherently higher mechanical strength and semi-insulating electrical properties. This enables the device to withstand high blocking voltages effectively while the passivation layer remains intact without cracking.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If conventional glass passivation is used, then the manufacturing process is straightforward, but the passivation layer cracks under stress reducing device effectiveness

Engineering Contradiction:

Improvepassivation layer integrityVSAvoidpassivation layer fabrication

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the material parameter from glass to SIPOS, which can be deposited using standard semiconductor fabrication techniques such as chemical vapor deposition (CVD). This maintains ease of manufacture while providing superior mechanical integrity and crack resistance.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20240055312A1Mesa device with stack thin film passivation

Publication Date: 2024.02.15 LITTELFUSE SEMICON WUXI

AI summary

An overvoltage protection device may include an n-type semiconductor substrate, a p-type layer disposed atop the n-type semiconductor substrate, and a passivation region formed in the n-type semiconductor substrate and the p-type layer, wherein the passivation region comprises a semi-insulating polycrystalline silicon (SIPOS) layer.