MESFET Optical Sensor Integration on CMOS Substrate

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Solution Overview

Problem

The sensitivity of photodiodes and JFETs integrated into CMOS substrates is low, and they require complex manufacturing processes involving cavity formation to allow light to reach optical sensors, increasing the number of masking steps and making the process less efficient.

Innovation Solution

A metal-semiconductor field-effect transistor (MESFET) arrangement is integrated directly on the surface of a CMOS substrate with source, gate, and drain electrodes located on or within a dielectric layer, allowing for direct integration of optical sensors without invasive cavity formation, using semiconducting materials that are processable at low temperatures and exhibit sufficient light absorption and carrier mobility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If photodiodes or JFETs are integrated into CMOS substrate, then optical sensing function is achieved, but sensitivity is low and manufacturing complexity increases due to cavity formation requirements

Engineering Contradiction:
Improveoptical sensing sensitivityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of forming cavities to expose the optical sensor to light from the front, the patent inverts the approach by allowing light to reach the optical sensor from the backside of the CMOS substrate. The optical sensor is integrated into the CMOS substrate with its active region positioned to receive light through the substrate, eliminating the need for front-side cavity formation while maintaining high sensitivity.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent transitions from two-dimensional planar integration to three-dimensional vertical integration by positioning the optical sensor within the CMOS substrate depth. The active region of the optical sensor is positioned at a specific depth within the substrate, allowing light to penetrate through the substrate and reach the sensor from the backside, thus utilizing the vertical dimension to solve the light access problem without affecting the front-side wiring layers.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Illumination intensity

If cavity formation is performed to allow light access to optical sensor, then light sensitivity is improved, but manufacturing steps and masking operations increase

Engineering Contradiction:
Improvelight access to sensorVSAvoidmanufacturing process simplicity
Core Design Contradiction:
Illumination intensityVSEase of manufacture

Solution Approach 1:

Instead of creating cavities from the front side to expose the optical sensor, the patent inverts the light access approach by allowing light to enter through the backside of the CMOS substrate. This eliminates the need for complex cavity formation steps, masking operations, and structural support requirements while maintaining effective light coupling to the sensor.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent extracts the light access problem from the front-side wiring layer structure by positioning the optical sensor to receive light from the backside. This separates the light access function from the front-side interconnect structure, eliminating the need to modify the wiring layers or create openings through them, thus simplifying the manufacturing process.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If optical sensor is integrated into CMOS substrate, then device integration is achieved, but effective pixel area is reduced due to cavity and wiring layer constraints

Engineering Contradiction:
Improveintegration capabilityVSAvoideffective pixel area
Core Design Contradiction:
Adaptability or versatilityVSArea of moving object

Solution Approach 1:

The patent utilizes the vertical dimension within the CMOS substrate to position the optical sensor's active region at an optimized depth, allowing light to access the sensor through the substrate without occupying horizontal space that would be required for front-side cavity structures. This maximizes the effective pixel area by eliminating the need for lateral cavity extensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The CMOS substrate serves multiple functions simultaneously: it provides the wiring layers for electrical interconnections, supports the optical sensor integration, and acts as the light transmission medium itself. By making the substrate transparent or translucent to the relevant wavelengths, it fulfills both the structural support role and the optical window function, eliminating the need for separate cavity structures.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables higher effective pixel area and a more planar surface for further processing, simplifying the manufacturing process and enhancing light sensitivity without the need for complex cavity formation, resulting in improved performance as optical sensors.

Implementation Method 1

using semiconducting materials that are processable in low temperatures as MESFET channels... exhibit sufficient light absorption and carrier mobility

Methodology Applied
Scientific EffectLight absorption: Absorption (EM radiation)

Implementation Method 2

The interface between the bottom gate electrode and the semiconducting channel layer is a Schottky junction

Methodology Applied
Scientific EffectSchottky junction:

Implementation Method 3

The interface between the bottom source electrode and the semiconducting channel layer is an ohmic junction, the interface between the bottom drain electrode and the semiconducting channel layer is an ohmic junction

Methodology Applied
Scientific EffectOhmic junction:

Data Source

PatentEP3766102B1Surface mesfet
Publication Date: 2022.08.31 EMBERION OY
  • EP3766102B1 patent drawingFigure 1~2
  • EP3766102B1 patent drawingFigure 3a~3e
  • EP3766102B1 patent drawingFigure 3f~3i

AI summary

A MESFET transistor on a horizontal substrate surface with at least one wiring layer on the substrate surface. The transistor comprises source, drain and gate electrodes which are at least partly covered by a semiconducting channel layer. The source, drain and gate electrodes optionally comprise interface contact materials for changing the junction type between each electrode and the channel. The interface between the source electrode and the channel is an ohmic junction, the interface between the drain electrode and the channel is an ohmic junction, and the interface between the gate electrode and the channel is a Schottky junction. The substrate is a CMOS substrate.