Configurable Mesh Data Bus for Island-Based Network Flow Processor
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Solution Overview
Problem
Current network processors face challenges in efficiently managing packet traffic and resource allocation across multiple islands in integrated circuits, leading to bottlenecks and reduced processing capabilities.
Innovation Solution
The island-based network flow processor (IB-NFP) integrates a configurable mesh data bus with distributed credit First-In-First-Out (FIFO) structures and a staggered island layout, enabling simultaneous operations across multiple islands and optimizing resource allocation through a mesh bus structure and distributed credit management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a traditional centralized bus structure is used in network processors, then resource allocation and packet traffic management become complex and bottlenecked, but implementing a distributed mesh bus structure increases device complexity and interconnect overhead
Solution Approach 1:
The bus system is segmented into multiple independent mesh networks (command mesh, data0 mesh, data1 mesh, pull-id mesh), each handling specific traffic types. This segmentation distributes the processing load across multiple specialized sub-networks, preventing bottlenecks while maintaining manageable complexity through functional separation.
Solution Approach 2:
The patent transitions from traditional hierarchical or centralized bus architectures to a two-dimensional mesh topology where islands are arranged in rows and columns with interconnects in both dimensions. This dimensional change provides multiple parallel paths for data flow, enabling concurrent operations and improving throughput without proportionally increasing complexity.
2Productivity
If multiple islands perform concurrent reads and writes across the bus, then resource utilization and processing efficiency improve, but credit management and flow control become more complex
Solution Approach 1:
Each island maintains its own credit counters and autonomously manages its buffer credits for outgoing transactions. Islands independently track available buffer space and use this information to control outgoing data flow without requiring centralized arbitration or complex handshaking protocols, enabling efficient concurrent operations with distributed control.
Solution Approach 2:
The credit management system uses feedback from buffer status to dynamically control data flow. When buffers are full, credit counters prevent further data transmission until space becomes available. This feedback mechanism automatically regulates concurrent reads and writes across multiple islands, maintaining flow control without centralized intervention.
3Adaptability or versatility
If islands are organized in a staggered layout to form mesh bus structure, then connectivity and concurrent access improve, but manufacturing precision requirements increase
Solution Approach 1:
All islands use identical standardized interfaces and connection patterns regardless of their position in the mesh. Each island has the same number of ports with the same functionality, allowing uniform interconnection rules to apply throughout the array. This universality simplifies manufacturing by eliminating the need for position-specific customization while maintaining full connectivity.
Solution Approach 2:
The mesh bus structure uses homogeneous interconnect elements throughout - identical link widths,相同 timing characteristics, and uniform routing patterns. This homogeneity ensures that all island connections have matched electrical and timing properties, reducing sensitivity to manufacturing variations and simplifying design verification while maintaining high connectivity.
Data Source
AI summary
An island-based network flow processor (IB-NFP) integrated circuit includes rectangular islands disposed in rows. A configurable mesh data bus includes a command mesh, a pull-id mesh, and two data meshes. The configurable mesh data bus extends through all the islands. For each mesh, each island includes a centrally located crossbar switch and eight half links. Two half links extend to ports on the top edge of the island, a half link extends to a port on a right edge of the island, two half links extend to ports on the bottom edge of the island, and a half link extents to a port on the left edge of the island. Two additional links extend to functional circuitry of the island. The configurable mesh data bus is configurable to form a command/push/pull data bus over which multiple transactions can occur simultaneously on different parts of the integrated circuit.