Reconfigurable Mesh Data Joining via FIFO Buffers
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Solution Overview
Problem
Existing multiple processing element systems face challenges in efficiently joining and merging data from multiple upstream processing elements in a reconfigurable computing environment, which affects overall performance and execution time due to limitations in instruction bandwidth and execution restrictions.
Innovation Solution
Implementing a reconfigurable mesh network with control agents executing on processing elements, utilizing circular buffers and FIFO memories to facilitate data exchange between processing elements, allowing for dynamic reconfiguration and efficient data flow management through join/merge operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple processing elements are used to increase computing power, then processing performance is improved, but data joining and merging becomes inefficient due to instruction bandwidth limitations
Solution Approach 1:
The patent segments the data joining operation into multiple independent stages, with each processing element handling specific data segments through dedicated FIFO buffers. This allows parallel data preparation while eliminating serialization bottlenecks in the joining process, thus maintaining high productivity while reducing execution time.
Solution Approach 2:
The patent implements preliminary action by having processing elements prepare and stage data in FIFO buffers before the actual join operation. Data is pre-processed, validated, and organized in advance, allowing the merging stage to proceed efficiently without instruction bandwidth limitations, thereby reducing overall execution time while maintaining multiple processing elements.
2Reliability
If data from multiple upstream processing elements is joined, then computation completeness is improved, but instruction bandwidth limitations reduce efficiency
Solution Approach 1:
The patent introduces FIFO buffers as intermediary structures between upstream processing elements and the join operation. These buffers act as mediators that decouple the data production rate from the joining rate, allowing complete data collection from multiple sources while maintaining high joining efficiency through buffered asynchronous operations.
Solution Approach 2:
The patent transitions from a single-dimensional sequential join process to a multi-dimensional parallel architecture where data flows through multiple independent FIFO channels. This dimensional expansion allows simultaneous data collection from multiple upstream elements without bandwidth constraints, ensuring computation completeness while maintaining joining efficiency.
3Productivity
If downstream processing elements are activated continuously, then processing throughput is maintained, but energy consumption increases
Solution Approach 1:
The patent implements feedback mechanisms where downstream processing elements monitor the availability of valid data in FIFO buffers. Elements are activated only when feedback indicates data readiness, and deactivated when buffers are empty. This maintains processing throughput by ensuring continuous work when data is available while reducing energy consumption by idle elements during data gaps.
Solution Approach 2:
The patent makes the activation state of downstream processing elements dynamic rather than static. Elements transition between active and inactive states based on real-time data availability in FIFO buffers, allowing the system to maintain throughput during data flow while conserving energy during idle periods, thus resolving the contradiction between continuous throughput and energy consumption.
Data Source
AI summary
Techniques are disclosed for managing data within a reconfigurable computing environment. In a multiple processing element environment, such as a mesh network or other suitable topology, there is an inherent need to pass data between processing elements. Subtasks are divided among multiple processing elements. The output resulting from the subtasks is then merged by a downstream processing element. In such cases, a join operation can be used to combine data from multiple upstream processing elements. A control agent executes on each processing element. A memory buffer is disposed between upstream processing elements and the downstream processing element. The downstream processing element is configured to automatically perform an operation based on the availability of valid data from the upstream processing elements.