Mesh Jig Support for High-Density Semiconductor Strip Reflow
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Solution Overview
Problem
As semiconductor devices decrease in size and increase in functionality, maintaining their position and preventing warpage during reflow and encapsulation becomes challenging, especially with high density semiconductor devices on strips.
Innovation Solution
A mesh jig is used to securely hold semiconductor components in place during reflow and encapsulation, comprising a carrier with pins or posts that penetrate through dummy areas of the interconnect substrate, ensuring physical control and reducing warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If semiconductor devices are placed in high density on strips, then productivity and functionality increase, but position stability and warpage control deteriorate during reflow
Solution Approach 1:
The mesh jig is prepared in advance with pins positioned at specific locations corresponding to dummy areas on the interconnect substrate. These pins are inserted through the dummy areas before the reflow process begins, establishing a preliminary mechanical constraint system that prevents device movement and substrate warpage during subsequent heating and processing operations.
2Adaptability or versatility
If semiconductor devices are placed in high density on strips, then functionality increases, but warpage control deteriorates during reflow and encapsulation
Solution Approach 1:
The mesh jig applies localized mechanical constraints only at the dummy areas of the interconnect substrate through strategically positioned pins. This local quality approach provides warpage control and position stability at critical locations without interfering with the high-density semiconductor devices or their functionality, allowing dense device placement while maintaining substrate flatness during reflow and encapsulation.
Data Source
AI summary
A semiconductor device has an interconnect substrate and an electrical component disposed over the substrate. A first carrier including a window is disposed over the interconnect substrate with the electrical component disposed within the window. A second carrier is disposed over the first carrier with a plurality of posts extending through the first carrier. The substrate is disposed over a third carrier. The posts may extend through the first carrier outside a footprint of the substrate. Alternatively, at least one of the posts extend through an opening in the substrate and the remaining posts are outside the footprint of the substrate. A plurality of pins extends from the second carrier to a dummy area of the substrate. Openings can be formed in a surface of the second carrier. The combination of first carrier, second carrier, and third carrier constitutes a mesh jig to support the strip of electrical components.