Configurable Dimension-Ordered Routing for Mesh Network Congestion
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Solution Overview
Problem
In multi-core processors, the 'skin effect' and 'affinity restriction' in mesh networks lead to performance issues and design complexity due to uneven data routing and the need for cores to be physically close to input/output devices, causing network congestion and latency variations.
Innovation Solution
Implementing a mesh I/O extension network, configurable dimension-ordered routing, and stacked dimension-ordered routing to reduce the skin effect by offloading heavy traffic, dynamically configuring routing based on data types, and using intermediate routing points to distribute traffic and reduce affinity restrictions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If dimension-ordered routing is used in mesh networks, then routing simplicity and deadlock-free operation are achieved, but network congestion and latency variations occur due to uneven traffic distribution
Solution Approach 1:
The patent implements dynamic routing configuration where the dimension ordering (XY or YX) can be changed at runtime based on traffic patterns. The system monitors network conditions and switches between routing schemes to optimize performance, transforming the static routing table into a dynamic adaptive system that resolves congestion while maintaining routing simplicity.
Solution Approach 2:
The patent changes the routing parameter (dimension ordering sequence) to resolve traffic distribution issues. By switching between XY-routing and YX-routing based on which dimension has lighter traffic, the system redistributes network load dynamically, improving throughput while keeping the routing logic simple and deadlock-free.
2Speed
If cores are placed physically close to input/output devices, then data transfer speed is improved, but design flexibility and system scalability are reduced
Solution Approach 1:
The patent introduces a mesh network with configurable dimension-ordered routing as an intermediary between processor cores and I/O devices. This intermediary provides intelligent traffic management that achieves fast data transfer without requiring physical proximity, thereby maintaining design flexibility and scalability.
Solution Approach 2:
The patent utilizes the network routing dimension (logical path selection) to compensate for physical distance. By optimizing the logical routing path through dimension ordering, the system achieves efficient data transfer without constraining the physical layout, allowing flexible core and I/O device placement.
3Speed
If heavy traffic is concentrated on specific network paths, then data transfer efficiency is improved, but network congestion and latency increase
Solution Approach 1:
The system dynamically adjusts routing paths based on real-time traffic conditions. When congestion is detected on one path, the system switches to an alternative dimension ordering to redistribute traffic, balancing load across the network and reducing latency while maintaining efficient data transfer.
Solution Approach 2:
The patent employs periodic monitoring and switching between different routing configurations. The system periodically evaluates traffic patterns and switches between XY and YX routing schemes to prevent congestion buildup, ensuring consistent performance and reduced latency through regular optimization cycles.
Data Source
AI summary
A processor includes a plurality of processor tiles, each tile including a processor core, and an interconnection network interconnects the processor cores and enables transfer of data among the processor cores. The interconnection network has a plurality of dimensions in which an ordering of dimensions for routing data is configurable.


