Mesh Router Path Establishment in System-on-Chip

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Solution Overview

Problem

Conventional bus architecture in System-on-Chip (SoC) technologies faces limitations in scalability and performance due to exclusive access and non-extensibility, while network-on-chip (NoC) architectures encounter issues with power consumption and path establishment between routers in n×n mesh topology structures.

Innovation Solution

A method for establishing paths between routers in an n×n mesh topology structure using routing and token packets, updating a routing table with hop counters and address information, and broadcasting packets to neighboring routers to efficiently connect IPs and deliver data through the established paths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If bus architecture is used to connect IPs in SoC, then simplicity of connection is improved, but scalability and performance deteriorate due to exclusive access limitations

Engineering Contradiction:
Improveconnection structureVSAvoidscalability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent divides the monolithic bus architecture into segmented network paths. Instead of a single shared bus, the system creates multiple independent routing paths through routers, allowing different IP blocks to communicate through dedicated routes. This segmentation enables simultaneous communications and eliminates the exclusive access bottleneck of traditional bus architectures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a one-dimensional bus structure to a two-dimensional mesh network topology. The n×n mesh provides multiple dimensions for data flow, allowing packets to travel through different routes (horizontal and vertical paths) between IP blocks. This dimensional expansion enables parallel communications and improves scalability beyond the limitations of linear bus structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If network-on-chip architecture is used to improve scalability, then adaptability is improved, but power consumption increases

Engineering Contradiction:
ImprovescalabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent implements preliminary path establishment through routing tables and hop counters before actual data transmission. Routers pre-compute optimal paths and store routing information, allowing data packets to follow predetermined efficient routes. This preliminary action prevents unnecessary transmissions and reduces the energy consumption associated with exploring multiple paths during runtime.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces routing tables and hop counters as intermediary mechanisms that mediate between data sources and destinations. These intermediaries optimize path selection and enable efficient routing decisions, reducing the energy consumption of the network by avoiding redundant transmissions and selecting optimal paths through the mesh topology.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If path establishment protocols are implemented in NoC, then routing efficiency is improved, but device complexity increases

Engineering Contradiction:
Improverouting efficiencyVSAvoidpath management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements self-service routing where each router independently manages its own routing table and makes autonomous routing decisions based on destination addresses and hop counters. Routers self-update their routing information and self-manage path establishment without requiring centralized control, reducing overall system complexity while maintaining high routing efficiency.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent employs feedback mechanisms through hop counters that track the number of hops taken in routing packets. This feedback information allows routers to make informed routing decisions, update routing tables based on actual path performance, and optimize future routing. The feedback loop enables adaptive routing that improves efficiency while maintaining manageable complexity through localized decision-making.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS7522538B2System-on-chip establishing paths between routers and method therefor
Publication Date: 2009.04.21 SAMSUNG ELECTRONICS CO LTD
  • US7522538B2 patent drawing
  • US7522538B2 patent drawing
  • US7522538B2 patent drawing

AI summary

A method of establishing a path between routers in a system-on-chip (SoC) of n×n mesh topology structure having a plurality of intellectual properties (IPs) each with a unique address and routers corresponding to each of the IPs respectively, including: receiving a routing packet including a hop counter, and updating address information and information of a stored routing table; establishing a path to at least one neighboring router using the updated routing table upon a request to establish the path; and delivering data by using the established path.