Mesh Shader Tile-Based Rendering Pipeline Memory Management
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Solution Overview
Problem
Current tile-based rendering (TBR) GPU silicon struggles to support mesh shaders due to the large amount of dynamic output data, leading to memory management issues and inefficiencies, particularly in allocating and deallocating memory, which increases hardware and firmware costs and reduces scalability.
Innovation Solution
Incorporating a mesh shader that outputs legacy mesh shader parameters along with an axis-aligned bounding box (AABB) structure, which is used by the tiler to generate a visibility stream indicating visibility in the view frustum, allowing for early primitive culling and reducing memory bandwidth usage by only rendering visible vertices and primitives.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If mesh shaders output huge amount of data at runtime, then the flexibility and programmability of the rendering pipeline is improved, but memory management complexity and hardware cost increase due to need for GPU memory management unit
Solution Approach 1:
The patent extracts the memory management function from the GPU to the host CPU. The host allocates memory for mesh shader outputs upfront based on maximum expected size, and provides this pre-allocated memory to the GPU. This removes the need for GPU-side memory management units while maintaining full mesh shader programmability and flexibility.
2Ease of operation
If memory is allocated or deallocated by GPU, then runtime flexibility is improved, but hardware cost increases due to GPU memory management unit
Solution Approach 1:
The host performs preliminary memory allocation before GPU execution based on the maximum expected output size from mesh shaders. This pre-allocation approach maintains runtime flexibility for the GPU to write outputs without requiring complex GPU memory management hardware, as all memory is already reserved and managed by the host.
3Adaptability or versatility
If mesh shaders are used with tile-based rendering, then rendering flexibility is improved, but memory bandwidth usage increases due to large output data
Solution Approach 1:
The patent extracts only the essential bounding box information from mesh shader outputs for tile-based rendering culling purposes. Instead of transferring all mesh shader output data to the tiler, only the compact AABB structures are sent for visibility testing, dramatically reducing memory bandwidth consumption while preserving full mesh shader functionality.
Data Source
AI summary
In aspects of the disclosure, a method, a system, and a computer-readable medium, are provided. The method for processing graphics data with a graphics rendering pipeline comprising a mesh shader and a tiler, comprising outputting, by the mesh shader in response to an input of the graphics data, legacy mesh shader output parameters including vertices and primitives, and additional data with a meshlet bounding-box, or axis-aligned bounding box (AABB) structure; sending the AABB to the tiler as an input, and generating, by the tiler, a visibility stream according to the AABB, wherein each entity of the visibility stream indicates that the AABB is fully visible, partially visible, or invisible in the view frustum; and sending the visibility stream back to the tiler as a further input along with the legacy mesh shader output parameters for coming rasterization in a fragment pass.