Message Protocol for Data Processing Systems

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Solution Overview

Problem

The inefficiency in data processing systems due to the limitation of packet-based communication protocols, which fragment large requests into smaller ones, leading to reduced performance, increased message header overhead, and decreased throughput when transferring data across interconnects in SoC systems.

Innovation Solution

Implementing a high-efficiency message protocol that assembles sequences of smaller write requests into intermediate-sized requests, allowing for optimized data transfer by leveraging the performance of high-speed serial buses and networks, such as PCIe, by reassembling these requests into larger packets that maximize data transfer rates and reduce buffer sizes and latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the interconnect divides large requests into smaller requests, then the transaction size limitation is satisfied, but the efficiency, performance and throughput are significantly reduced

Engineering Contradiction:
Improvetransaction size complianceVSAvoiddata transfer efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies segmentation by dividing a large write request into multiple smaller write requests (beats) that can be transmitted through the interconnect. Each beat contains a portion of the original data along with control information including a beat identifier and a last beat indicator. This segmentation allows the system to comply with interconnect transaction size limitations while maintaining the ability to reconstruct the original large request at the destination, thereby resolving the contradiction between satisfying size constraints and preserving transfer efficiency.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the interconnect divides large requests into smaller requests, then the transaction size limitation is satisfied, but the message header overhead is significantly increased

Engineering Contradiction:
Improvetransaction size complianceVSAvoidmessage header overhead
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies merging by consolidating multiple small write requests back into a single large write request at the destination device. The destination uses the beat identifiers and last beat indicators to reassemble the segmented data into the original large request structure. This merging process eliminates the cumulative header overhead that would otherwise be present in multiple separate small requests, thereby reducing the total message header overhead while still complying with interconnect transaction size limitations during transmission.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If the interconnect divides large requests into smaller requests, then the transaction size limitation is satisfied, but the throughput is significantly reduced

Engineering Contradiction:
Improvetransaction size complianceVSAvoiddata transfer throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-tagging each segmented write request with control information including beat identifiers and last beat indicators during the segmentation phase. This preliminary tagging enables the destination device to efficiently reassemble the original large request without requiring complex processing or additional communication overhead during the reassembly phase. By preparing the necessary control information in advance, the system maintains high throughput while complying with transaction size limitations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11860811B2Message protocol for a data processing system
Publication Date: 2024.01.02 ARM LTD
  • US11860811B2 patent drawing
  • US11860811B2 patent drawing
  • US11860811B2 patent drawing

AI summary

The present disclosure provides a system and methods for transferring data across an interconnect. One method includes, at a request node, receiving, from a source high speed serial controller, a write request from a source, dividing the write request into sequences of smaller write requests each having a last identifier, and sending, to a home node, the sequences of smaller write requests; and, at the home node, sending, to a destination high speed serial controller, the sequences of smaller write requests for assembly into intermediate write requests that are transmitted to a destination. Each sequence of smaller write requests is assembled into an intermediate write request based on the last identifier.