Message Queue Segmentation for Storage Control and Data Paths
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Solution Overview
Problem
Conventional network-attached storage devices are inefficient as data messages flow through the CPU, leading to bottlenecks in processing power and communication bandwidth, especially when scaling up storage capacity.
Innovation Solution
Implementing different processing paths for control messages and data messages, where control messages are routed through the processing device for administrative and security operations, and data messages are bypassed through the processing device, directly communicated between the storage device and the storage client.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data messages are routed through the CPU for processing, then control and security operations can be performed, but processing bottlenecks occur and power consumption increases
Solution Approach 1:
The patent segments message processing by creating separate processing paths: control messages are routed through the CPU for administrative and security operations, while data messages are routed directly between the network interface and storage device, bypassing the CPU. This segmentation resolves the contradiction by allowing control messages to receive proper processing while data messages maintain high throughput without CPU bottlenecks.
Solution Approach 2:
The patent introduces a message queue as an intermediary component that buffers and manages data messages, enabling direct communication between the network interface and storage device without requiring CPU intervention. This intermediary structure allows data messages to be processed efficiently while control messages continue to flow through the CPU for necessary operations.
2Reliability
If all messages are processed through the CPU, then comprehensive control is achieved, but communication bandwidth requirements increase
Solution Approach 1:
The patent divides message processing into two segments: control messages that require CPU processing for security and administrative functions, and data messages that are handled directly by the network interface and storage device. This segmentation reduces CPU power consumption by eliminating unnecessary processing of data messages while maintaining comprehensive control over control messages.
Solution Approach 2:
The network interface and storage device are enabled to handle data messages independently without CPU intervention, allowing these components to serve themselves for data transfer operations. This self-service capability reduces the energy burden on the CPU while maintaining system control through the separate control message path.
3Productivity
If storage capacity is scaled up by adding more processing power, then processing capability increases, but system complexity and cost increase
Solution Approach 1:
The patent segments processing requirements by function, allowing the CPU to be optimized for control message handling while data message processing is handled by simpler, dedicated components. This segmentation enables storage systems to scale capacity without proportionally increasing CPU power, as the majority of data messages bypass the CPU entirely.
Solution Approach 2:
The message queue acts as an intermediary that decouples the network interface from the storage device, allowing data messages to be processed through a simplified path without requiring powerful processing devices. This intermediary structure enables storage capacity scaling with less complex processing hardware.
Data Source
AI summary
A memory sub-system connectable to a microprocessor to provide network storage services. The memory sub-system has a random-access memory configured with: first queues for the microprocessor and a network interface; second queues for the microprocessor and a processing device; and third queues for the processing device and a storage device. The processing device is configured to: generate first control messages and first data messages from packets received by the network interface; place the first control messages into the first queues for the microprocessor; and place the first data messages into the third queues for the storage device. The microprocessor processes the first control messages to implement security and administrative functions and place second control messages in the second queues. The storage device is configured to retrieve the first data messages from the third queues and second control messages from the second queues for processing.