Message Tunneling in NVMe Storage for Data Processing
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Solution Overview
Problem
Moving large amounts of raw data for processing and analysis in modern IT infrastructure is energy-intensive and burdensome on network and computer resources, leading to increased latency and resource utilization.
Innovation Solution
Implementing a system that uses NVMe protocols for message tunneling, allowing data processing to occur within storage devices, reducing the need to move raw data by embedding tunneling commands within data messages and routing tunneled messages to on-board processors for execution, thereby offloading processing tasks from host devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If large amounts of raw data are moved to processors for processing and analyzing, then data processing and analysis can be performed, but energy consumption increases and network bandwidth is burdened
Solution Approach 1:
The patent introduces an intermediary processing layer at the storage device level (using FPGAs or ASICs) that acts as a mediator between raw data storage and host processor analysis. This intermediary performs preliminary data processing, filtering, and analytics functions locally, reducing the volume of data that needs to be transferred to host processors while maintaining processing capability.
Solution Approach 2:
The patent adds a new dimension to the traditional storage-processor architecture by embedding processing capabilities directly within the storage device. This creates a three-dimensional processing hierarchy: storage-level processing (FPGA/ASIC), network-level processing, and host-level processing, allowing data to be processed at multiple levels before reaching the main processor.
2Productivity
If large amounts of raw data are moved to servers for processing, then data analysis can be performed, but latency increases
Solution Approach 1:
The patent implements preliminary data processing and filtering at the storage device level before data is transferred to host processors. By performing initial analytics, data validation, and preprocessing operations at the source, the system reduces the time required for subsequent processing stages and minimizes data transfer latency.
3Productivity
If data processing is performed at host devices, then comprehensive analysis can be achieved, but computational burden on host systems increases
Solution Approach 1:
The patent segments the data processing workload across multiple levels: storage device processing (FPGA/ASIC for low-level filtering and analytics), network device processing (for intermediate aggregation and routing), and host processor processing (for high-level analysis). This segmentation distributes the computational burden, preventing any single device from becoming overwhelmed.
Data Source
AI summary
According to one general aspect, a device may include a host interface circuit configured to communicate with a host device via a data protocol that employs data messages. The device may include a storage element configured to store data in response to a data message. The host interface circuit may be configured to detect when a tunneling command is embedded within the data message; extract a tunneled message address information from the data message; retrieve, via the tunneled message address information, a tunneled message stored in a memory of the host device; and route the tunneled message to an on-board processor and/or data processing logic. The on-board processor and/or data processing logic may be configured to execute one or more instructions in response to the tunneled message.