Metadata-Driven Processing Pipeline for Key-Value Store Throughput

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Solution Overview

Problem

Conventional integrated circuits for data processing are inefficient due to the need for different hardware elements based on protocols, leading to suboptimal performance in terms of throughput, latency, and power consumption, particularly in key-value store implementations.

Innovation Solution

A flexible dataflow-based architecture with a pipeline of processing blocks, each with a different function, is established to process data packets based on meta-data, enabling efficient key-value store operations by selectively executing atomic operations and maintaining transaction consistency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If different hardware elements are implemented for different protocols, then protocol-specific processing capability is improved, but device complexity and cost increase

Engineering Contradiction:

Improveprotocol-specific processing capabilityVSAvoidhardware element variety

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal data processing device that can handle multiple protocols (TCP/IP, UDP, SCTP, ESP, IPsec) using the same hardware pipeline. The device uses configurable processing blocks that can be programmed to perform different protocol-specific functions, eliminating the need for separate dedicated hardware for each protocol while maintaining full protocol support capability.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs dynamically configurable processing blocks within the pipeline that can be programmed at runtime to perform different protocol processing functions. This dynamic reconfigurability allows the same hardware structure to adapt to different protocol requirements without physical reconfiguration, resolving the contradiction between protocol-specific capability and hardware complexity.

Inventive Principle:

Principle #15Dynamics

2Ease of manufacture

If conventional CPU-based key-value store processing is used, then implementation simplicity is maintained, but throughput and latency performance deteriorate

Engineering Contradiction:

Improveimplementation simplicityVSAvoidthroughput and latency performance

Core Design Contradiction:

Ease of manufactureVSProductivity

Solution Approach 1:

The patent replaces the conventional software-based CPU processing model with a hardware-based pipeline architecture. The pipeline uses dedicated processing blocks that execute atomic operations in parallel, substituting the sequential mechanical processing of a CPU with concurrent hardware execution, thereby achieving significant improvements in throughput and latency while maintaining implementation simplicity through a unified hardware structure.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If more hardware elements are added to improve processing capability, then performance increases, but power consumption increases

Engineering Contradiction:

Improvedata processing performanceVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent segments the data processing function into discrete atomic operations (parse, lookup, insert, delete, etc.) that are executed by specialized processing blocks in a pipeline. This segmentation allows the system to activate only the specific processing blocks needed for each protocol and operation type, avoiding the power consumption of idle hardware elements while maintaining high processing performance through efficient resource utilization.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS9519486B1Method of and device for processing data using a pipeline of processing blocks

Publication Date: 2016.12.13 XILINX INC

AI summary

A method of processing data in an integrated circuit is described. The method comprises establishing a pipeline of processing blocks, wherein each processing block has a different function; coupling a data packet having data and meta-data to an input of the pipeline of processing blocks; and processing the data of the data packet using predetermined processing blocks based upon the meta-data. A device for processing data in an integrated circuit is also described.