Metadata Pre-Erase Control in Non-Volatile Memory During Seek

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Solution Overview

Problem

The existing data storage devices face inefficiencies in write operations due to the latency introduced by the need to erase blocks in non-volatile memory before writing metadata, which increases the overall time required for data storage and retrieval.

Innovation Solution

Implementing pre-erase control circuitry to opportunistically erase blocks in non-volatile memory during idle times, such as during seek operations, to eliminate the erase latency and reduce the time spent on write processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If blocks in non-volatile memory are erased before write operations, then write reliability is improved, but write latency increases due to the time required for erasure

Engineering Contradiction:
Improvewrite reliabilityVSAvoidwrite latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs block erasure in advance during seek operations before the actual write operation is needed. The pre-erase control circuitry monitors seek operations and triggers erasure of target blocks during the seek time, so that when the write operation commences, the blocks are already erased and ready for immediate data writing, thus eliminating write latency while maintaining reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system proactively counteracts the potential latency issue by performing the erasure operation beforehand during idle seek time. By anticipating the need for erased blocks and preparing them in advance during periods when the actuator is moving to different tracks, the system prevents write latency from occurring in the first place

Inventive Principle:
Principle #9Preliminary anti-action

2Loss of time

If block erasure is performed during seek operations, then write latency is reduced, but device complexity increases due to additional control circuitry

Engineering Contradiction:
Improvewrite latencyVSAvoidcontrol circuitry complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The pre-erase control circuitry is designed to perform multiple functions: it monitors seek operations, determines which blocks require erasure, triggers the erasure process, and manages the coordination between the actuator mechanism and non-volatile memory. This multi-functional approach consolidates what could be multiple separate components into a single integrated control unit, reducing overall system complexity while achieving the latency reduction goal

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system uses its own idle seek time to perform the erasure operations without requiring external intervention or additional dedicated time resources. The pre-erase control circuitry autonomously manages the erasure process during periods when the actuator mechanism is already moving, making the system self-sufficient in eliminating write latency without adding external complexity

Inventive Principle:
Principle #25Self-service

3Productivity

If seek time is reduced below threshold, then productivity is improved, but pre-erase operations cannot be completed

Engineering Contradiction:
Improveseek operation speedVSAvoidpre-erase completion
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs erasure operations partially during seek operations, erasing blocks as time permits rather than requiring complete erasure before the write operation. The pre-erase control circuitry monitors the remaining seek time and adjusts the erasure progress accordingly, erasing as many blocks as possible during the available window. This partial action approach maintains high productivity while making progress on pre-erase operations

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system employs periodic background erasure operations that occur during idle seek time. Rather than requiring a single long seek operation to complete all erasures, the system performs multiple smaller erasure tasks across different seek operations, gradually building up a pool of pre-erased blocks over time. This periodic approach ensures pre-erase reliability is maintained through repeated attempts while preserving high seek operation productivity

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS12591396B2Data storage device with pre-erase of metadata from non-volatile memory
Publication Date: 2026.03.31 WESTERN DIGITAL TECHNOLOGIES INC
  • US12591396B2 patent drawing
  • US12591396B2 patent drawing
  • US12591396B2 patent drawing

AI summary

Various illustrative aspects are directed to a data storage device, method, and one or more processing devices that are configured to: send a first command to a non-volatile memory in response to determining that a seek time associated with a seek operation exceeds a threshold; and send a second command to the non-volatile memory at or before an end of the seek operation, wherein the non-volatile memory is configured to begin performing a pre-erase operation of one or more blocks in the non-volatile memory in response to receiving the first command, and the non-volatile memory is configured to cease performing the pre-erase operation in response to receiving the second command.