Metal-All-Around Source/Drain Contact for Low-Resistance Nanosheet ICs
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Solution Overview
Problem
As semiconductor devices shrink in size, the contact area between features decreases, leading to increased resistance and potential performance issues, with existing attempts to increase contact area resulting in higher capacitance and decreased channel compressive stress.
Innovation Solution
A metal-all-around contact structure is formed by creating a sacrificial liner around the source or drain region, followed by removing it and replacing it with a conductive material, ensuring a larger contact area without significantly increasing capacitance or decreasing channel stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the contact area between source/drain region and contact structure is increased, then resistance is reduced, but capacitance increases and channel compressive stress decreases
Solution Approach 1:
The contact structure transitions from a planar top-surface contact to a three-dimensional all-around contact that wraps vertically around the source/drain region. This dimensional change allows the contact to engage the region from multiple spatial directions (top, sidewalls, and bottom), dramatically increasing the effective contact area without expanding the horizontal footprint that would increase capacitance to adjacent structures.
Solution Approach 2:
The contact structure is nested around the source/drain region, with the contact material forming a surrounding structure that encloses the region. This nesting configuration maximizes the contact interface area by utilizing the vertical space around the region, while the compact nested geometry maintains close spacing to adjacent channels, preventing excessive capacitance increase.
2Reliability
If the contact area between source/drain region and contact structure is increased, then resistance is reduced, but channel compressive stress decreases
Solution Approach 1:
The contact structure applies compressive stress locally at the source/drain contact interfaces where it is needed for low resistance, while the gate structure maintains compressive stress on the channel region. The all-around contact configuration allows stress to be concentrated at the contact points rather than distributed across the entire device, preserving channel stress while achieving low contact resistance.
Solution Approach 2:
The contact structure is segmented into distinct regions that contact different surfaces of the source/drain region (top surface contact and sidewall contacts). This segmentation allows the compressive stress to be applied at specific localized contact points rather than uniformly across the entire structure, maintaining effective stress on the channel while achieving comprehensive contact area for low resistance.
3Productivity
If feature size is scaled down to increase device density, then more devices fit on chip, but contact area decreases leading to increased resistance
Solution Approach 1:
As device dimensions scale down in the planar direction, the contact structure compensates by extending into the vertical dimension. The all-around contact wraps around the source/drain region, utilizing the z-axis (vertical direction) to maintain sufficient contact area even as x-y plane dimensions shrink. This vertical expansion of the contact interface allows continued scaling of device density while preserving contact resistance characteristics.
Data Source
AI summary
A fabrication method and associated integrated circuit (IC) structures and devices that include a metal-all-around contact structure coupled with an S/D region are described herein. In one example, an IC structure may include a region of a doped semiconductor material. An IC structure may include a stack of nanoribbons of a semiconductor material including first portions and second portions on either side of the region, wherein the first portions are in contact with a first side of the region and the second portions are in contact with a second side of the region. An IC structure may include a conductive material over portions of the region between the first side and the second side in a same layer as at least one of the nanoribbons of the stack.