Semiconductor Device Metal Bit Line Side Contact
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Solution Overview
Problem
Conventional semiconductor technologies face challenges with high resistance in buried bit lines and the need for trench formation, which limits miniaturization and integration due to increased cell sizes.
Innovation Solution
The semiconductor device employs metal bit lines connected to one-side-contacts formed on the sidewalls of active regions, eliminating the need for trench formation between buried bit lines, thereby reducing resistance and enabling high integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ion implantation process is used to form buried bit lines, then the bit lines can be formed, but the resistance becomes high and operation speed decreases
Solution Approach 1:
The patent changes the material parameter of the bit line from doped silicon (formed by ion implantation) to metal material. This parameter change fundamentally reduces the resistance of the bit line, thereby improving operation speed and eliminating the high resistance problem associated with conventional ion implantation processes.
2Reliability
If trenches are formed to separate neighboring buried bit lines, then the bit lines can be separated, but cell sizes increase which is undesirable for high integration
Solution Approach 1:
The patent extracts and eliminates the trench structure from the conventional bit line formation process. By using metal bit lines that can be directly formed without trenches, the design removes the space-consuming trench structure while maintaining bit line separation through alternative means, thereby reducing cell size and enabling high integration.
Solution Approach 2:
The patent transitions from a planar bit line structure requiring trenches for separation to a vertical/different-dimensional arrangement where metal bit lines can be separated by insulating layers or spatial arrangement in the vertical dimension, eliminating the need for horizontal trench separation and reducing cell area.
3Productivity
If conventional technologies are used for miniaturization, then existing processes can be maintained, but the technologies reach their limits and cannot achieve further miniaturization under 4F2
Solution Approach 1:
The patent changes the fundamental material parameter from silicon-based structures to metal-based structures for bit lines. This material parameter change enables miniaturization beyond the limits of conventional silicon technologies by providing lower resistance and allowing new structural arrangements that work effectively at sub-4F2 dimensions.
Solution Approach 2:
The patent employs composite material structures combining metal bit lines with insulating materials and doped regions. This composite approach creates a new system that overcomes the limitations of single-material conventional technologies, enabling further miniaturization while managing the increased process complexity through integrated material solutions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in lower resistance buried bit lines and allows for high integration without the need for trench formation, suitable for design rules under 4F2, enhancing miniaturization and operation speed.
Implementation Method 1
a first conductive layer doped with an impurity for forming a cell junction
Implementation Method 2
metal bit lines, each configured to be connected to the side contact and fill a portion of each trench
Data Source
AI summary
A method for fabricating a semiconductor device includes forming a first conductive layer doped with an impurity for forming a cell junction over a semiconductor substrate, forming a second layer over the first conductive layer, forming a plurality of active regions by etching the second layer and the first conductive layer, the plurality of the active regions being separated from one another by trenches, forming a side contact connected to a sidewall of the first conductive layer, and forming a plurality of metal bit lines each connected to the side contact and filling a portion of each trench.