Metal-Bridge Die Interconnects for Thermal Fatigue Relief
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Solution Overview
Problem
Multichip modules experience operational failures due to metal fatigue in electrical interconnect traces caused by temperature changes, resulting from mismatched coefficients of thermal expansion between carrier materials and redistribution layers.
Innovation Solution
The implementation of an electrical interconnect structure with bridges that do not contact the multichip module carrier material, allowing the interconnect traces to resiliently flex without breaking as the carrier material contracts and expands, comprising conductive traces connected to bond pads on chips with bridges positioned above the electrical insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wafer fanout redistribution layers with conductive interconnect traces are used to connect chips, then electrical connections between chips are established, but the interconnect traces undergo metal fatigue due to thermal expansion mismatch causing open circuits
Solution Approach 1:
The patent introduces an intermediary flexible bridge structure between the rigid carrier and the interconnect traces. This bridge acts as a mediator that absorbs thermal stress through elastic deformation, preventing direct transmission of thermal expansion forces to the interconnect traces. The bridge includes a first portion connected to the carrier, a second portion connected to the interconnect trace, and a resilient portion connecting these two portions, which flexes to accommodate thermal expansion differences.
Solution Approach 2:
The patent changes the mechanical parameters of the interconnect structure by introducing a flexible bridge with controlled elasticity. The bridge's resilient portion is designed with specific material properties and geometric characteristics (width, thickness, length) that allow it to undergo elastic deformation within a specific range, transforming the rigid interconnect system into a flexible one that can accommodate thermal stress without failure.
2Manufacturing precision
If the interconnect traces are made rigid to maintain structural stability, then manufacturing precision is improved, but the traces become susceptible to metal fatigue from temperature changes
Solution Approach 1:
The patent segments the interconnect structure into distinct functional portions: a rigid carrier portion for structural support and positioning, a flexible bridge portion for stress absorption, and a rigid interconnect trace portion for electrical connection. This segmentation allows each portion to be optimized for its specific function - the carrier and traces maintain manufacturing precision while the bridge provides fatigue resistance through flexibility.
Solution Approach 2:
The patent applies local quality by making only the bridge portion flexible while keeping the carrier and interconnect traces rigid. The flexible property is localized to the resilient portion of the bridge that directly experiences thermal stress, while other portions maintain rigidity for precise positioning and electrical connection. This localized flexibility solves the contradiction without compromising overall structural integrity.
3Ease of manufacture
If the carrier material is used to support the chips and interconnect structure, then device assembly is simplified, but the mismatched coefficient of thermal expansion causes interconnect trace failure
Solution Approach 1:
The flexible bridge serves as an intermediary element between the carrier material and the interconnect traces. It maintains the simplified assembly structure while mediating the thermal expansion mismatch by deforming elastically under thermal stress, thereby protecting the interconnect traces from failure while preserving the ease of manufacture benefits of the carrier-based assembly.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution prevents interconnect trace failure by isolating them from thermal expansion issues, ensuring reliable operation of the multichip module across temperature changes.
Implementation Method 1
The coefficient of thermal expansion for the carrier material is sufficiently different from the coefficient of thermal expansion for the redistribution layers such that the interconnect traces undergo metal fatigue
Implementation Method 2
allowing the interconnect traces to resiliently flex without breaking as the carrier material contracts and expands
Data Source
AI summary
A multichip module comprises a carrier, a plurality of chips, an electrical insulating layer, and an electrical interconnect structure. The carrier includes a bottom wall and four side walls defining an internal cavity. The chips are positioned in the internal cavity, with each chip including a plurality of bond pads. The electrical insulating layer is formed from electrically insulating material and is positioned on an upper surface of the carrier and the chips. The electrical interconnect structure includes a plurality of interconnect traces, with each interconnect trace formed from electrically conductive material and electrically connected to a first bond pad on a first chip and a second bond pad on a second chip. Each interconnect trace includes a bridge having a segment that is spaced apart from, and positioned above, the electrical insulating layer.