Metal Bump Overlay Offset for IMD Delamination
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Solution Overview
Problem
The high stress from metal bumps in semiconductor devices can cause delamination between inter-metal dielectric (IMD) layers, leading to an increased likelihood of open circuits during the packaging process.
Innovation Solution
The implementation of an overlay offset between metal vias and pillars in the metal bump structure, which reduces stress transmission to the IMD layers, thereby minimizing delamination and enhancing device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal bumps are used to establish electrical contact in flip-chip bonding, then electrical connection reliability is improved, but stress on IMD layers increases causing delamination
Solution Approach 1:
The metal bump structure is segmented into multiple components: a metal via through the substrate, a metal pillar extending from the via, and an optional cap layer. This segmentation allows stress to be distributed across multiple interfaces rather than concentrated at a single bump-IMD interface, reducing delamination risk while maintaining electrical connection reliability.
Solution Approach 2:
The patent applies different materials and structures at different locations: the metal via provides electrical conductivity, the metal pillar provides mechanical support and stress distribution, and the cap layer (when present) provides additional stress relief. This local differentiation of properties allows the structure to simultaneously achieve reliable electrical connection and reduced stress on IMD layers.
2Ease of manufacture
If metal bumps with direct alignment are used, then manufacturing process is simplified, but stress concentration causes delamination between IMD layers
Solution Approach 1:
The metal pillar acts as an intermediary element between the metal via and the cap layer or bonding interface. It provides a transition zone that distributes stress over a larger area, mediating between the concentrated stress from direct alignment and the need to prevent delamination. This allows simplified alignment processes to be used without causing harmful stress concentration.
3Strength
If high stress is transmitted from metal bumps to IMD layers, then mechanical bonding strength is improved, but delamination risk increases leading to open circuits
Solution Approach 1:
The metal bump structure is designed to dynamically manage stress through its multi-component architecture. The metal via and pillar configuration allows stress to be distributed and redirected rather than directly transmitted to the IMD layers, maintaining mechanical bonding strength while preventing the stress concentration that would cause delamination and open circuits.
Data Source
AI summary
A semiconductor device comprises a substrate comprising a major surface and a plurality of metal bumps on the major surface. Each of the plurality of metal bumps comprises a metal via on the major surface and a metal pillar on the metal via having an overlay offset between the metal pillar and metal via. A first metal bump of the metal bumps has a first overlay offset and a second metal bump of the metal bumps farther than the first metal bump to a centroid of the substrate has a second overlay offset greater than the first overlay offset.