Metal Cap Contact Stack Without TiN for Lower Source/Drain Resistance
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Solution Overview
Problem
Transistor contacts, particularly source/drain contacts, in integrated circuits face high resistance due to the presence of nitrogen-based layers, which hinder the efficient propagation of electronic signals and increase the size of transistors, compromising both size and speed.
Innovation Solution
A contact stack is developed that eliminates nitrogen-based layers by using a metal-based cap layer directly on top of a silicide layer, reducing contact resistance through direct contact with low resistivity metals like tungsten, ruthenium, or molybdenum, and employing low energy physical vapor deposition to inhibit diffusion and eliminate the need for nitrogen-based liners.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a nitrogen-based capping layer is used to protect the silicide layer, then adhesion and protection are improved, but contact resistance increases
Solution Approach 1:
The patent removes the nitrogen-based capping layer (TiN) from the contact stack, extracting the harmful element that increases contact resistance. The silicide layer is exposed directly to the metal cap, eliminating the high-resistance barrier while alternative protection methods are employed elsewhere in the process.
Solution Approach 2:
The patent changes the material parameter of the cap layer from nitrogen-based (TiN) to metal-based (W, Ru, Mo), fundamentally altering the electrical properties of the contact stack. This material substitution reduces contact resistance by up to 20% while maintaining structural integrity.
2Reliability
If a liner material is added to improve adhesion during MOL processes, then adhesion is improved, but via resistance increases
Solution Approach 1:
The patent extracts and eliminates the liner material from the contact stack structure. By removing this additional layer, the via resistance is reduced while adhesion requirements are met through optimized silicide-metal cap interfaces and process conditions.
3Productivity
If high energy deposition is used to deposit metal layers, then deposition speed is improved, but element diffusion increases
Solution Approach 1:
The patent changes the energy parameter of the deposition process from high energy to low energy. This reduction in deposition energy prevents excessive element diffusion and intermixing at interfaces, maintaining sharp compositional boundaries and material purity in the contact stack.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces contact resistance by up to 20% and prevents undesirable element diffusion, enhancing the performance and efficiency of transistor contacts while maintaining a compact transistor footprint.
Implementation Method 1
low energy physical vapor deposition to inhibit diffusion
Implementation Method 2
low energy physical vapor deposition to inhibit diffusion
Data Source
AI summary
A contact stack of a semiconductor device comprises: a source/drain region; a metal silicide layer above the source/drain region; a metal cap layer directly on the metal silicide layer; and a conductor on the metal cap layer. A method comprises: depositing a metal silicide layer in a feature of a substrate; in the absence of an air break after the depositing of the metal silicide layer, preparing a metal cap layer directly on the metal silicide layer; and depositing a conductor on the metal cap layer.


