Ultra-Thin Metal Chalcogenide Interconnect Barriers for Lower RC Delay
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Solution Overview
Problem
As integrated circuit (IC) transistor density increases, interconnect parasitics, particularly the resistance-capacitance (RC) delay, become a significant challenge due to the scaling of interconnect structures, and conventional barrier materials threaten to become a greater portion of the interconnect structure, leading to higher resistances and performance issues.
Innovation Solution
The use of a metal-chalcogen barrier material, formed by doping a metallic barrier with chalcogens such as sulfur, selenium, or tellurium, which converts into a metal chalcogenide layer during thermal processing, enhancing diffusion barrier properties and reducing scattering of charge carriers, thereby minimizing the barrier material thickness and maintaining effective diffusion control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional barrier materials are used in interconnect structures, then diffusion barrier properties are maintained, but interconnect resistance increases and performance deteriorates
Solution Approach 1:
The patent changes the material parameters by introducing metal chalcogenide compounds (such as tantalum sulfide, tungsten sulfide, molybdenum sulfide) with specific crystal structures and electronic properties. These materials exhibit higher electrical conductivity and superior diffusion barrier properties compared to conventional barrier materials, directly resolving the contradiction between maintaining barrier effectiveness and reducing interconnect resistance
Solution Approach 2:
The patent employs composite interconnect structures where metal chalcogenide barrier layers are integrated with copper or cobalt fill materials. The metal chalcogenide layer provides both diffusion barrier functionality and enhanced electrical conductivity, creating a composite system that simultaneously improves both barrier properties and reduces resistance losses
2Reliability
If barrier material thickness is increased to maintain diffusion barrier effectiveness, then diffusion control is improved, but interconnect resistance increases
Solution Approach 1:
The patent utilizes the unique electronic and structural parameters of metal chalcogenide materials, which provide high diffusion barrier effectiveness at atomic-layer thicknesses. The layered crystal structure and strong bonding characteristics of these materials enable effective diffusion control with minimal thickness, thereby reducing resistance while maintaining barrier integrity
Solution Approach 2:
The patent implements ultra-thin metal chalcogenide films as barrier layers in interconnect structures. These thin films provide robust diffusion barrier properties despite their minimal thickness, allowing for reduced barrier material thickness while maintaining effective diffusion control and minimizing resistance impacts
3Productivity
If interconnect density is increased to improve transistor density, then IC performance is improved, but RC delay increases
Solution Approach 1:
The patent changes the electrical parameters of interconnect structures by implementing metal chalcogenide barrier materials with superior conductivity. This reduces the resistance component of RC delay, allowing for increased interconnect density without proportional increases in delay, thereby supporting higher transistor density while maintaining performance
Solution Approach 2:
The patent applies metal chalcogenide materials specifically at critical interfaces where diffusion barriers are needed (such as between copper fill and dielectric materials). This localized application provides optimal barrier properties at key locations while minimizing the overall resistance impact on the interconnect network, enabling higher density with controlled RC delay
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces interconnect resistance, lowers RC delay, and improves IC performance by maintaining a robust diffusion barrier while minimizing material thickness, leading to lower power consumption and higher performance.
Implementation Method 1
Barrier material 105 may retard diffusion/migration of a fill material 107 out of the interconnect structure
Implementation Method 2
reducing scattering of charge carriers, thereby minimizing the barrier material thickness and maintaining effective diffusion control
Data Source
Figure 1A~1B
Figure 2A
Figure 2B
AI summary
Integrated circuit interconnect structures including an interconnect metallization feature with a barrier material comprising a metal and a chalcogen. Introduction of the chalcogen may improve diffusion barrier properties at a given barrier material layer thickness with increasing the barrier layer thickness. A barrier material, such as TaN, may be deposited at minimal thickness, and doped with a chalcogen before or after one or more fill materials are deposited over the barrier material. During thermal processing mobile chalcogen impurities may collect within regions within the barrier material to high enough concentrations for at least a portion of the barrier material to be converted into a metal chalcogenide layer. The metal chalcogenide layer may have greater crystallinity than a remainder of the barrier layer.