Metal Clip Semiconductor Package With Parallel Bond-Pad Pathways

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Solution Overview

Problem

As transistor die sizes shrink, insufficient clearance can lead to solder bleed-out from under metal clips, causing electrical shorting and rendering the semiconductor die inoperable, particularly in advanced power semiconductor technologies like SiC and GaN.

Innovation Solution

The semiconductor package includes a metal clip attached to a bond pad of the semiconductor die by a solder joint, with an additional electrical pathway that runs parallel to the metal clip, reducing the amount of solder needed and minimizing the risk of solder bleed-out.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If transistor die sizes are shrunk to reduce package size, then productivity and integration density are improved, but the risk of solder bleed-out causing electrical shorting increases

Engineering Contradiction:
Improveintegration densityVSAvoidrisk of electrical shorting
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The electrical connection is segmented into multiple pathways: the primary metal clip connection and additional electrical pathways (such as solder bumps or conductive structures) that provide alternative current routes. This segmentation ensures that if solder bleed-out occurs in one area, electrical connectivity is maintained through other segments, thus resolving the contradiction between miniaturization and shorting risk.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Additional intermediary electrical connection structures are introduced between the metal clip and the bond pad. These intermediaries (such as solder bumps or conductive vias) create redundant electrical pathways that mediate the connection, ensuring that electrical functionality is preserved even when solder bleed-out compromises the primary metal clip connection in miniaturized packages.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Area of stationary object

If clearance space is reduced to accommodate smaller die sizes, then device compactness is improved, but solder bleed-out control becomes difficult

Engineering Contradiction:
Improvepackage areaVSAvoidsolder bleed-out control
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

The solution moves the electrical connection problem into another dimension by implementing vertical or lateral electrical pathways that do not rely solely on the horizontal clearance under the metal clip. By adding electrical connections in additional spatial dimensions (such as vertical vias through the substrate or lateral connections through the substrate), the design achieves compact packaging while maintaining solder bleed-out control through redundant connection paths.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Different regions of the package are assigned different functional qualities: the area under the metal clip is optimized for mechanical support and primary electrical connection, while additional localized electrical connection points are strategically placed in regions less susceptible to solder bleed-out. This local differentiation allows compact design while maintaining manufacturing ease and reliability.

Inventive Principle:
Principle #3Local quality

3Power

If bond pad size is reduced for advanced power semiconductor technologies, then current density is improved, but clearance for metal clip attachment is insufficient

Engineering Contradiction:
Improvecurrent densityVSAvoidclearance length
Core Design Contradiction:
PowerVSLength of stationary object

Solution Approach 1:

The electrical connection function is segmented across multiple structures: the metal clip provides mechanical support and primary connection, while additional electrical pathways (such as solder bumps, conductive vias, or trace connections) provide redundant electrical connectivity. This segmentation allows the use of smaller bond pads for high current density applications while ensuring adequate electrical connection through distributed connection points rather than relying solely on large clearance space.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The additional electrical connection structures serve multiple functions: they provide redundant electrical pathways, enhance mechanical stability, and compensate for reduced clearance space. By making these additional structures multi-functional, the design achieves high current density with small bond pads while maintaining adequate connection reliability without requiring excessive clearance length.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design reduces the likelihood of electrical shorting caused by solder bleed-out while maintaining the integrity of the electrical pathway, ensuring the semiconductor die remains operational even with reduced solder usage.

Implementation Method 1

a first bonding region of a metal clip to a first bond pad by a solder joint

Methodology Applied
Scientific EffectSoldering: Soldering

Data Source

PatentUS12266628B2Semiconductor package having a metal clip and related methods of manufacturing
Publication Date: 2025.04.01 INFINEON TECHNOLOGIES AG
  • US12266628B2 patent drawing
  • US12266628B2 patent drawing
  • US12266628B2 patent drawing

AI summary

A semiconductor package includes: a semiconductor die attached to a lead frame and having a first bond pad at a side of the semiconductor die facing away from the lead frame; a metal clip having a first bonding region attached to the first bond pad by a solder joint, the metal clip providing an electrical pathway to the first bond pad; and an additional electrical pathway to the first bond pad. A first end of the additional electrical pathway is attached to the first bond pad. At one or more locations between the first end and a second end of the additional electrical pathway, the additional electrical pathway is attached to a surface of the first bonding region of the metal clip that faces away from the first bond pad. Methods of producing the semiconductor package are also described.