Metal Contact Structure for Low-Resistance Semiconductor Interfaces
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Solution Overview
Problem
The challenge of forming reliable semiconductor devices at smaller sizes is exacerbated by the increasing complexity of fabrication processes due to decreasing feature sizes, which affects the electrical connection between metal contacts and semiconductor structures.
Innovation Solution
A method involving the transformation of a metal-containing layer into a metal-semiconductor compound layer and a metal oxide layer, followed by selective growth of a metal contact feature, is performed in-situ using a cluster tool to improve electrical connections, reducing resistance and preventing oxidation or contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency increases and costs decrease, but fabrication process complexity increases and reliability of electrical connections deteriorates
Solution Approach 1:
The patent segments the contact formation process into distinct stages: forming metal-containing layer 140, selective transformation to metal-semiconductor compound layer 145, selective oxidation to metal oxide layer 147, selective removal of metal oxide, and selective growth of metal contact features 152. This segmentation allows each step to be optimized independently, maintaining reliability despite overall process complexity
Solution Approach 2:
The patent introduces intermediate layers (metal-semiconductor compound layer 145 and metal oxide layer 147) that mediate between the metal-containing layer and the final metal contact features. These intermediaries facilitate controlled transformation and selective removal processes, ensuring reliable electrical connections through well-defined interface properties
2Ease of manufacture
If conventional metal contact formation is used, then manufacturing is simpler, but electrical connection resistance is higher and connections are less reliable
Solution Approach 1:
The patent changes the physical and chemical parameters of the metal-containing layer through controlled transformation. The metal-containing layer 140 is transformed into metal-semiconductor compound layer 145 with different electrical properties, then selectively oxidized to metal oxide layer 147. These parameter changes enable lower resistance and more reliable connections by optimizing the electrical properties at each interface
Solution Approach 2:
The patent creates a composite structure consisting of multiple layers with different material properties: metal-containing layer, metal-semiconductor compound layer, metal oxide layer, and metal contact features. This composite structure combines the advantages of different materials to achieve both low resistance and high reliability while maintaining manufacturability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the electrical connection between metal contacts and semiconductor structures by reducing resistance and maintaining structural integrity, thereby improving the reliability and efficiency of semiconductor devices.
Implementation Method 1
heating the epitaxial structure and the metal-containing layer to transform a first portion of the metal-containing layer contacting the top surface of the epitaxial structure into a metal-semiconductor compound layer
Implementation Method 2
oxidizing the metal-containing layer to transform a second portion of the metal-containing layer over the metal-semiconductor compound layer and the dielectric layer into a metal oxide layer
Implementation Method 3
applying a metal chloride-containing etching gas on the metal oxide layer to remove the metal oxide layer
Implementation Method 4
forming a metal contact feature over the top surface of the metal-semiconductor compound layer
Data Source
AI summary
A semiconductor structure is provided. The semiconductor structure includes an epitaxial structure over a semiconductor substrate. The semiconductor structure also includes a conductive feature over the semiconductor substrate. The conductive feature includes a high-k dielectric layer and a metal layer on the high-k dielectric layer, and a top surface of the metal layer is below a top surface of the high-k dielectric layer. The semiconductor structure further includes a metal-semiconductor compound layer formed on the epitaxial structure. In addition, the semiconductor structure includes a first metal contact structure formed on the top surface of the metal layer of the conductive feature. The semiconductor structure further includes a second metal contact structure formed on the metal-semiconductor compound layer.


